TMS320C6747 Datasheet, PDF (34/203 Pages) Texas Instruments – Floating-point Digital Signal Processor

TMS320C6745/6747 Floating-point Digital Signal Processor
SPRS377B – SEPTEMBER 2008 – REVISED DECEMBER 2008
www.ti.com
Table 3-18. Multichannel Audio Serial Ports (McASPs) Terminal Functions (continued)
SIGNAL NAME
EMA_CS[3]/AMUTE2/GP2[6]
PIN NO _{TYPE(1) PULL(2)}
PTP ZKB
MUXED
- T7
O
IPU EMIFA, GPIO
DESCRIPTION
McASP2 mute
output.
3.6.16 Universal Serial Bus Modules (USB0, USB1)
Table 3-19. Universal Serial Bus (USB) Terminal Functions
SIGNAL NAME
PIN NO _{TYPE(1) PULL(2)}
PTP ZKB
DESCRIPTION
USB0 2.0 OTG (USB0)
USB0_DM
138 G4
A
USB0 PHY data minus
USB0_DP
137 F4
A
USB0 PHY data plus
USB0_VDDA33
140 H5 PWR
USB0 PHY 3.3-V supply
USB0_VSSA33
139 H4 PWR
USB0 PHY 3.3-V supply reference
USB0_VDDA18
USB0_VDDA12 ⁽³⁾
135 E3
134 C3
PWR
PWR
USB0 PHY 1.8-V supply input
USB0 PHY 1.2-V LDO output for bypass cap
USB0_VSSA
136 F3 PWR
USB0 PHY 1.8-V and 1.2-V supply reference
USB0_ID
- D2
A
USB0 PHY identification (mini-A or mini-B plug)
USB0_VBUS
- D3
A
USB0 bus voltage
USB0_DRVVBUS/GP4[15]
- E4
0
IPD
USB0 controller VBUS control output. Multiplexed
with GPIO bank 4 pin 15.
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
125 B5
I
IPD USB_REFCLKIN. Optional clock input.
USB1 1.1 OHCI (USB1)
USB1_DM
- B3
A
USB1 PHY data minus
USB1_DP
- A3
A
USB1 PHY data plus
USB1_VDDA33
- C1 PWR
USB1 PHY 3.3-V supply
USB1_VDDA18
- C2 PWR
USB1 PHY 1.8-V supply
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
125 B5
I
IPD USB_REFCLKIN. Optional clock input.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
(3) Core power supply LDO output for USB PHY. This pin must be connected via a 0.22 -µF capacitor to VSS. When the USB peripheral is
not used, the USB_VDDA12 signal should still be connected via a 1-µF capacitor to VSS.
3.6.17 Ethernet Media Access Controller (EMAC)
Table 3-20. Ethernet Media Access Controller (EMAC) Terminal Functions
SIGNAL NAME
AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11]
PIN NO
TYPE⁽¹⁾ PULL⁽²⁾
PTP ZKB
RMII
MUXED
129 A4
I/O
IPD McASP0, GPIO, BOOT
DESCRIPTION
EMAC 50-MHz
clock input or
output.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
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