LMH3401 Datasheet, PDF (34/48 Pages) Texas Instruments – LMH3401 7-GHz, Ultra-Wideband, Fixed-Gain, Fully-Differential Amplifier

LMH3401
SBOS695A – AUGUST 2014 – REVISED DECEMBER 2014
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Shifting the common-mode voltage with the resistor network comes at the expense of signal attenuation.
Modeling the ADC input as the parallel combination of a resistance (R_IN) and capacitance (C_IN) using values
taken from the ADC data sheet, the approximate differential input impedance (Z_IN) for the ADC can be calculated
at the signal frequency. The effect of C_IN on the overall calculation of gain is typically minimal and can be ignored
for simplicity (that is, Z_IN = R_IN). The ADC input impedance creates a divider with the resistor network; the gain
(attenuation) for this divider can be calculated by Equation 12:
GAIN =
2R_P || Z_IN
2R_O + 2R_P || Z_IN
(12)
With ADCs that have internal resistors that bias the ADC input to the ADC input common-mode voltage, the
effective R_IN is equal to twice the value of the bias resistor. For example, the ADS5485 has a 1-kΩ resistor tying
each input to the ADC V_CM; therefore, the effective differential R_IN is 2 kΩ.
The introduction of the R_P resistors also modifies the effective load that must be driven by the amplifier.
Equation 13 shows the effective load created when using the R_P resistors.
R_L = 2R_O + 2R_P || Z_IN
(13)
The R_P resistors function in parallel to the ADC input such that the effective load (output current) at the amplifier
output is increased. Higher current loads limit the LMH3401 differential output swing.
Using the gain and knowing the full-scale input of the ADC (V_{ADC FS}), the required amplitude to drive the ADC
with the network can be calculated using Equation 14:
V_{AMP PP}
=
V_{ADC FS}
GAIN
(14)
As with any design, testing is recommended to validate whether the specific design goals are met.
10.2.2.4 GSPS ADC Driver
The LMH3401 can drive the full Nyquist bandwidth of ADCs with sampling rates up to 4 GSPS, as shown in
Figure 65. If the front-end bandwidth of the ADC is more than 2 GHz, use a simple noise filter to improve SNR.
Otherwise, the ADC can be connected directly to the amplifier output pins. Matching resistors may not be
required, however allow space for matching resistors on the preliminary design.
Single-Ended,
50-W Source
V_IN
12.5 W
50 W
12.5 W
Device
200 W
V_CM
200 W
10 W V_OUT+ ^RO
10 W ^VOUT- R_O
CM
Figure 65. GSPS ADC Driver
A_IN+
GSPS ADC
A_{IN- CM}
34
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