TLC32046C Datasheet, PDF (33/57 Pages) Texas Instruments – Wide-Band Analog Interface Circuit

3.3.4 Receive Amplifier Input
PARAMETER
TEST
CONDITIONS
MIN TYP†
A/D converter offset error (filters in)
10
CMRR
Common-mode rejection ratio at IN+, IN –, or AUX
IN+, AUX IN –
See Note 6
55
ri
Input resistance at IN+, IN – or
AUX IN+, AUX IN+, AUX IN –, REF
100
NOTE 6: The test condition is a 0-dBm, 1-kHz input signal with a 16-kHz conversion rate.
3.3.5
Transmit Filter Output
PARAMETER
TEST
CONDITIONS
MIN TYP†
Output offset voltage at OUT+ or
TLC32046C, I
15
VOO OUT– (single-ended relative to
ANLG GND)
TLC32046M
15
Maximum peak output voltage
RL ≥ 300 Ω,
swing across RL at OUT+ or OUT– TLC32046C, I Offset voltage
±3
(single-ended)
=0
VOM
Maximum peak output voltage
swing between OUT+ and OUT–
(differential output)
RL ≥ 600 Ω
±6
† _{All typical values are at TA = 25°C.}
3.3.6 Receive and Transmit Channel System Distortion, SCF Clock
Frequency = 288 kHz (see Note 7)
PARAMETER
TEST CONDITIONS
MIN TYP†
Attenuation of second harmonic of
A/D input signal
Attenuation of third and higher
harmonics of A/D input signal
Single-ended
Differential
Single-ended
Differential
VI = – 0.1 dB to – 24 dB
70
62
70
65
57
65
Attenuation of second harmonic of ^Single-ended
D/A input signal
Differential
Attenuation of third and higher
Single-ended
harmonics of D/A input signal
Differential
† _{All typical values are at TA = 25°C.}
VI = – 0 dB to – 24 dB
70
62
70
65
57
65
MAX
70
MAX
80
85
MAX
UNIT
mV
dB
kΩ
UNIT
mV
mV
V
V
UNIT
dB
dB
dB
dB
3–3