TMS320F243_07 Datasheet, PDF (32/121 Pages) Texas Instruments – DSP CONTROLLERS

TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064D − DECEMBER 1997 − REVISED FEBRUARY 2006
interrupt request structure (continued)
Table 10. F243/F241 Interrupt Source Priority and Vectors
INTERRUPT
NAME
Reset
Reserved
NMI
PDPINT
ADCINT
XINT1
XINT2
SPIINT
RXINT
TXINT
CANMBINT
CANERINT
CMP1INT
CMP2INT
CMP3INT
TPINT1
TCINT1
TUFINT1
TOFINT1
TPINT2
TCINT2
TUFINT2
TOFINT2
CAPINT1
CAPINT2
CAPINT3
OVERALL
PRIORITY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CPU
INTERRUPT
AND
VECTOR
ADDRESS
RSN
0000h
−
0026h
NMI
0024h
INT1
0002h
INT2
0004h
INT3
0006h
INT4
0008h
BIT
POSITION IN
PIRQRx AND
PIACKRx
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0.10
0.11
0.12
0.13
0.14
0.15
1.0
1.1
1.2
1.3
1.4
1.5
1.6
PERIPHERAL
INTERRUPT
VECTOR
(PIV)
MASKABLE?
SOURCE
PERIPHERAL
MODULE
DESCRIPTION
N/A
N
RS pin,
Watchdog
Reset from pin, watchdog
timeout
N/A
N
CPU
Emulator Trap
N/A
0020h
0004h
0001h
0011h
0005h
0006h
0007h
0040h
0041h
0021h
0022h
0023h
0027h
0028h
0029h
002Ah
002Bh
002Ch
002Dh
002Eh
0033h
0034h
0035h
N
Nonmaskable
Interrupt
Nonmaskable interrupt
Y
EV
Power device protection
interrupt pin
Y
ADC
ADC interrupt in
high-priority mode
Y
External External interrupt pins in
Interrupt Logic high priority
Y
External External interrupt pins in
Interrupt Logic high priority
Y
SCI
SCI receiver interrupt in
high-priority mode
Y
SCI
SCI transmitter interrupt in
high-priority mode
Y
EV
Compare 1 interrupt
Y
EV
Compare 2 interrupt
Y
EV
Compare 3 interrupt
Y
EV
Timer 1 period interrupt
Y
EV
Timer 1 PWM interrupt
Y
EV
Timer 1 underflow
interrupt
Y
EV
Timer 1 overflow interrupt
Y
EV
Timer 2 period interrupt
Y
EV
Timer 2 PWM interrupt
Y
EV
Timer 2 underflow
interrupt
Y
EV
Timer 2 overflow interrupt
Y
EV
Capture 1 interrupt
Y
EV
Capture 2 interrupt
Y
EV
Capture 3 interrupt
32
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