ADS6149 Datasheet, PDF (32/70 Pages) Texas Instruments – 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

ADS6149/ADS6129
ADS6148/ADS6128
SLWS211B – JULY 2008 – REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS - ADS6149 (continued)
All plots are at 25°C, AVDD = 3.3 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock. 1.5 V_PP
differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain,
LVDS output interface, 32K point FFT (unless otherwise noted)
PERFORMANCE
vs
TEMPERATURE
92
77
f_IN = 60 MHz
90
76
88
SFDR
75
86
74
84
73
SNR
82
72
80
−40 −20
0
20
40
60
T − Temperature − °C
Figure 27.
71
80
G015
PERFORMANCE
vs
INPUT CLOCK DUTY CYCLE
96
77
f_IN = 5 MHz
92
76
SFDR
88
75
84
74
SNR
80
73
76
72
PERFORMANCE
vs
INPUT CLOCK AMPLITUDE
94
92 ^{fIN = 60 MHz}
90
SFDR
88
86
SNR
84
82
80
78
0.20
0.70
1.20
1.70
2.20
2.70
Input Clock Amplitude − V_PP
Figure 28.
PERFORMANCE
vs
VCM VOLTAGE
90
f_IN = 60 MHz
External Reference Mode
88
SFDR
86
78
77
76
75
74
73
72
71
70
G016
76
75
74
84
73
SNR
82
72
72
71
30 35 40 45 50 55 60 65 70
Input Clock Duty Cycle − %
G017
Figure 29.
80
71
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
V_VCM − VCM Voltage − V
G018
Figure 30.
OUTPUT NOISE HISTOGRAM
40
RMS (LSB) = 0.995
35
30
25
20
15
10
5
0
8203 8204 8205 8206 8207 8208 8209 8210 8211 8212
Output Code
G019
Figure 31.
32
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