TMS320VC5507 Datasheet, PDF (31/135 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
3.1 Memory
The 5507 supports a unified memory map (program and data accesses are made to the same physical space).
The total on-chip memory is 192K bytes (64K 16-bit words of RAM and 32K 16-bit words of ROM).
3.1.1 On-Chip Dual-Access RAM (DARAM)
The DARAM is located in the byte address range 000000h−00FFFFh and is composed of eight blocks of
8K bytes each (see Table 3−1). Each DARAM block can perform two accesses per cycle (two reads, two
writes, or a read and a write). DARAM can be accessed by the internal program, data, or DMA buses. The
HPI can only access the first four (32K bytes) DARAM blocks.
Table 3−1. DARAM Blocks
BYTE ADDRESS RANGE
MEMORY BLOCK
000000h − 001FFFh
DARAM 0 (HPI accessible)^†
002000h − 003FFFh
DARAM 1 (HPI accessible)
004000h − 005FFFh
DARAM 2 (HPI accessible)
006000h − 007FFFh
DARAM 3 (HPI accessible)
008000h − 009FFFh
DARAM 4
00A000h − 00BFFFh
DARAM 5
00C000h − 00DFFFh
DARAM 6
00E000h − 00FFFFh
DARAM 7
† _{First 192 bytes are reserved for Memory-Mapped Registers (MMRs).}
3.1.2 On-Chip Single-Access RAM (SARAM)
The SARAM is located at the byte address range 010000h−01FFFFh and is composed of 8 blocks of 8K bytes
each (see Table 3−2). Each SARAM block can perform one access per cycle (one read or one write). SARAM
can be accessed by the internal program, data, or DMA buses.
Table 3−2. SARAM Blocks
BYTE ADDRESS RANGE
010000h − 011FFFh
012000h − 013FFFh
014000h − 015FFFh
016000h − 017FFFh
018000h − 019FFFh
01A000h − 01BFFFh
01C000h − 01DFFFh
01E000h − 01FFFFh
MEMORY BLOCK
SARAM 0
SARAM 1
SARAM 2
SARAM 3
SARAM 4
SARAM 5
SARAM 6
SARAM 7
April 2004 − Revised January 2005
SPRS244C
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