THS7373_10 Datasheet, PDF (31/50 Pages) Texas Instruments – 4-Channel Video Amplifier with 1-SD and 3-HD Sixth-Order Filters and 6-dB Gain

THS7373
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TYPICAL CONFIGURATION AND VIDEO
TERMINOLOGY
A typical application circuit using the THS7373 as a
video buffer is shown in Figure 98. It shows a DAC or
encoder driving the input channels of the THS7373.
One channel is a CVBS connection using the
standard definition (CVBS) video filters. This signal
can be an NTSC, PAL, or SECAM video signal. The
other three channels are the component video
Y’/P’_B/P’_R (sometimes labeled Y’U’V’ or incorrectly
labeled Y’/C’_B/C’_R) video signals. These signals are
typically 720p, 1080i, or up to 1080p30 signals. If the
video DAC samples at greater than 74.25 MHz, then
480i/576i or 480p/576p signals are also supported
while effectively minimizing DAC images. Because
the HD filters can be bypassed, other formats such as
1080p60 (also known as Full-HD or True-HD) or
computer R'G'B' resolutions up to QXGA can also be
supported with the THS7373.
SBOS506 – DECEMBER 2009
Note that the Y’ term is used for the luma channels
throughout this document rather than the more
common luminance (Y) term. This usage accounts for
the definition of luminance as stipulated by the
International Commission on Illumination (CIE). Video
departs from true luminance because a nonlinear
term, gamma, is added to the true RGB signals to
form R’G’B’ signals. These R’G’B’ signals are then
used to mathematically create luma (Y’). Thus,
luminance (Y) is not maintained, providing a
difference in terminology.
This rationale is also used for the chroma (C’) term.
Chroma is derived from the nonlinear R’G’B’ terms
and, thus, it is nonlinear. Chominance (C) is derived
from linear RGB, giving the difference between
chroma (C’) and chrominance (C). The color
difference signals (P’_B/P’_R/U’/V’) are also referenced
in this manner to denote the nonlinear (gamma
corrected) signals.
CVBS
R
Y'/G'
R
P’_B/B'
R
P’_R/R'
R
THS7373
1 CVBS IN
CVBS OUT 14
2 HD CH1 IN HD CH1 OUT 13
3 HD CH2 IN HD CH2 OUT 12
4 HD CH3 IN HD CH3 OUT 11
5 GND
6 DISABLE
V_S+ 10
HD BYPASS 9
7 NC
NC 8
CVBS Out
75 W
Y' Out
75 W
75 W ^{P'B Out}
To GPIO Controller
or GND
75 W ^{P'R Out}
+3 V to +5 V
75 W
75 W
75 W
75 W
Figure 98. Typical Four-Channel System Inputs from DC-Coupled Encoder/DAC
with DC-Coupled Line Driving
Copyright © 2009, Texas Instruments Incorporated
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