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OPA2695 Datasheet, PDF (31/40 Pages) Texas Instruments – Dual, Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER with Disable
OPA2695
www.ti.com..................................................................................................................................................................................................... SBOS354 – APRIL 2008
THERMAL ANALYSIS
The OPA2695 does not require external heatsinking
for most applications. Maximum desired junction
temperature sets the maximum allowed internal
power dissipation as described below. In no case
should the maximum junction temperature be allowed
to exceed +150°C.
Operating junction temperature (TJ) is given by TA +
PD × θJA. The total internal power dissipation (PD) is
the sum of quiescent power (PDQ) and additional
power dissipated in the output stage (PDL) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. PDL depends on the required output
signal and load. However, for a grounded resistive
load, PDL would be at a maximum when the output is
fixed at a voltage equal to one-half of either supply
voltage (for equal bipolar supplies). Under this
condition, PDL = VS2/(4 × RL), where RL includes
feedback network loading.
Note that it is the power in the output stage and not
into the load that determines internal power
dissipation.
As an absolute worst-case example, compute the
maximum TJ using an OPA2695ID (SO package) in
the circuit of Figure 68 operating at the maximum
specified ambient temperature of +85°C and driving a
grounded 100Ω load.
PD = 10V ´ 28.6mA + 52/(4 ´ (100W || 458W)) = 362mW
(10)
Maximum TJ = +85°C + (0.36W ´ 100°C/W) = 121°C
(11)
A similar calculation for the device in a QFN package
(OPA2695RGT) with a PowerPAD™ thermal
connection results in an estimated junction
temperature TJ = +105°C. These maximum operating
junction temperatures are well below most system
level targets. Most applications are lower because an
absolute worst-case output stage power was
assumed in this calculation.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier such as the OPA2695
requires careful attention to board layout parasitics
and external component types. Recommendations
that will optimize performance include:
a) Minimize parasitic capacitance to any ac
ground for all of the signal I/O pins. Parasitic
capacitance on the output and inverting input pins
can cause instability; on the noninverting input, it can
react with the source impedance to cause
unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins
should be opened in all of the ground and power
planes around those pins. Otherwise, ground and
power planes should be unbroken elsewhere on the
board.
b) Minimize the distance (< 0.25", or 0.635cm)
from the power-supply pins to high-frequency
0.1µF decoupling capacitors. At the device pins,
the ground and power plane layout should not be in
close proximity to the signal I/O pins. Avoid narrow
power and ground traces to minimize inductance
between the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. An optional
supply-decoupling capacitor across the two power
supplies (for bipolar operation) improves
2nd-harmonic distortion performance. Larger (2.2µF
to 6.8µF) decoupling capacitors, effective at a lower
frequency, should also be used on the main supply
pins. These may be placed somewhat farther from
the device and may be shared among several
devices in the same area of the PCB.
c) Careful selection and placement of external
components preserves the high-frequency
performance of the OPA2695. Resistors should be
a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high frequency performance.
Again, keep the leads and PCB trace length as short
as possible. Never use wirewound-type resistors in a
high frequency application. Because the output pin
and inverting input pin are the most sensitive to
parasitic capacitance, always position the feedback
and series output resistor, if any, as close as possible
to the output pin. Other network components, such as
noninverting input termination resistors, should also
be placed close to the package. Where double-sided
component mounting is allowed, place the feedback
resistor directly under the package on the other side
of the board between the output and inverting input
pins. The frequency response is primarily determined
by the feedback resistor value, as described
previously. Increasing its value reduces the
bandwidth, while decreasing it gives a more peaked
frequency response. The 402Ω feedback resistor
(used in the Typical Characteristics at a gain of +8 on
±5V supplies) is a good starting point for design. Note
that a 523Ω feedback resistor, rather than a direct
short, is required for the unity gain follower
application. A current-feedback op amp requires a
feedback resistor—even in the unity gain follower
configuration—to control stability.
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA2695
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