TLK6201EA Datasheet, PDF (3/19 Pages) Texas Instruments – 6.25-Gbps Cable and PC Board Equalizer

TLK6201EA
www.ti.com
SLLS738 – AUGUST 2006
An on-chip band-gap voltage circuit generates a supply-voltage-independent reference from which all internally
required voltages and bias currents are derived.
DEVICE INFORMATION
The TLK6201EA is available in a small-footprint, 3-mm × 3-mm, 16-pin QFN package, with a lead pitch of
0.5 mm. The pinout is shown in Figure 2.
RGT PACKAGE
(TOP VIEW)
16 15 14 13
GND ¹
12 _VCC
DIN+ ²
11 _DOUT+
EP
DIN– ³
10 _DOUT–
GND ⁴
9 _VCC
5678
P0019-04
Figure 2. Pinout of TLK6201EA
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
TYPE
COC0
16
Analog
COC1
DE0
DE1
DIN+
DIN–
DIS
DOUT+
DOUT–
GND
LOS
POL
SWG
VCC
15
7
6
2
3
13
11
10
1, 4, EP
14
8
5
9, 12
Analog
CMOS in
CMOS in
Analog in
Analog in
CMOS in
CML out
CML out
Supply
CMOS out
CMOS in
CMOS in
Supply
DESCRIPTION
Offset cancellation filter capacitor terminal 2. Connect an additional filter capacitor between
this pin and COC1 (pin 15). To disable the offset cancellation loop, connect COC1 and
COC0 (pins 15 and 16).
Offset cancellation filter capacitor terminal 1. Connect an additional filter capacitor between
this pin and COC0 (pin 16). To disable the offset cancellation loop, connect COC1 and
COC0 (pins 15 and 16).
Selects 4 dB of output signal de-emphasis when set to high level. Internally pulled up.
Selects 8 dB of output signal de-emphasis when set to high level. Internally pulled up.
Noninverted data input. On-chip load terminated to ground. Connect a 100-Ω differential
transmission line to terminals DIN+ and DIN–.
Inverted data input. On-chip load terminated to ground. Connect a 100-Ω differential
transmission line to terminals DIN+ and DIN–.
Disables CML output stage when set to high level. Internally pulled down.
Noninverted data output. On-chip 50-Ω back-terminated to VCC.
Inverted data output. On-chip 50-Ω back-terminated to VCC.
Circuit ground. Exposed die pad (EP) must be grounded.
High level indicates that the input signal amplitude is below the fixed threshold level.
Output data signal polarity select (internally pulled up): Setting to high level or leaving pin
open selects normal polarity. Low level selects inverted polarity.
Output swing control. The output swing is increased by 50% when set to high level.
Internally pulled down.
3.3-V, ±10% supply voltage
Submit Documentation Feedback
3