TLK6201EA Datasheet, PDF (2/19 Pages) Texas Instruments – 6.25-Gbps Cable and PC Board Equalizer

TLK6201EA
SLLS738 – AUGUST 2006
www.ti.com
BLOCK DIAGRAM
A simplified block diagram of the TLK6201EA is shown in Figure 1. This compact, low-power, 6.25-Gbps
equalizer consists of a high-speed data path with offset cancellation circuitry, a loss-of-signal detection block,
and a band-gap voltage reference and bias current generation block. The equalizer requires a single 3.3-V
±10% supply voltage. All circuit parts are described in detail as follows.
COC0 COC1
VCC
GND
Offset
Cancellation
DIN+
DIN–
Fixed Equalizer
Stage
+
–
Gain Stage
+
–
Gain Stage
Band-Gap Voltage
Reference and
Bias Current
Generation
DE0
DE1
POL
+
+
–
–
Gain Stage
Loss of
Signal Detection
Output
Buffer
Stage
DOUT+
DOUT–
DIS
SWG
LOS
Figure 1. Simplified Block Diagram of the TLK6201EA
B0052-04
HIGH-SPEED DATA PATH
The high-speed data signal with frequency-dependent loss is applied to the data path by means of the input
signal pins DIN+/DIN–. The data path consists of the fixed equalizer input stage, three gain stages which
provide the required gain to ensure a limited-output signal, and an output buffer stage. The equalized and
amplified data output signal is available at the output pins DOUT+/DOUT–, which provide 2 × 50-Ω
back-termination to VCC. The output stage also includes a data polarity-switching function, which is controlled
by the POL input, and a disable function, controlled by the signal applied to the DIS input pin.
The output swing can be increased 50% by applying a high-level signal to the SWG pin.
Up to 12 dB of output signal de-emphasis can be selected using the pins DE0 and DE1.
An offset cancellation compensates the inevitable internal offset voltages and thus ensures proper operation
even for very small input data signals.
The low-frequency cutoff is as low as 3.5 kHz with the built-in filter capacitor. For applications which require
even lower cutoff frequencies, an additional external filter capacitor can be connected to the COC0/COC1 pins.
LOSS-OF-SIGNAL DETECTION
The output signal of the second gain stage is monitored by the loss-of-signal detection circuitry. In this block, the
input signal is compared to a fixed threshold. If the low frequency components of the input signal fall below this
threshold, a loss of signal is indicated at the LOS pin.
A squelch function can be easily implemented by connecting the LOS output to the adjacent DIS input. This
measure avoids chattering of the output when no input signal is present.
BAND-GAP VOLTAGE AND BIAS GENERATION
The TLK6201EA equalizer is supplied by a single 3.3-V ±10% supply voltage connected to the VCC pins. This
voltage is referred to ground (GND).
2
Submit Documentation Feedback