TLC5615C Datasheet, PDF (3/18 Pages) Texas Instruments – 10-BIT DIGITAL-TO-ANALOG CONVERTERS

recommended operating conditions
Supply voltage, VDD
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
Reference voltage, Vref to REFIN terminal
Load resistance, RL
Operating free-air temperature, TA
TLC5615C
TLC5615I
TLC5615C, TLC5615I
10-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS142C – OCTOBER 1996 – REVISED MARCH 2000
MIN NOM MAX
4.5
5
5.5
2.4
0.8
2 2.048 VDD – 2
2
0
70
– 40
85
UNIT
V
V
V
V
kΩ
°C
°C
electrical characteristics over recommended operating free-air temperature range, V_DD = 5 V ± 5%,
V_ref = 2.048 V (unless otherwise noted)
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
Resolution
10
Integral nonlinearity, end point adjusted (INL)
Vref = 2.048 V, See Note 1
Differential nonlinearity (DNL)
Vref = 2.048 V, See Note 2
EZS Zero-scale error (offset error at zero scale)
Vref = 2.048 V, See Note 3
Zero-scale-error temperature coefficient
Vref = 2.048 V, See Note 4
EG
Gain error
Vref = 2.048 V, See Note 5
Gain-error temperature coefficient
Vref = 2.048 V, See Note 6
Zero scale
80
PSRR Power-supply rejection ratio
See Notes 7 and 8
Gain
80
TYP
± 0.1
3
1
MAX UNIT
bits
± 1 LSB
± 0.5 LSB
± 3 LSB
ppm/°C
± 3 LSB
ppm/°C
dB
Analog full scale output
RL = 100 kΩ
2Vref(1023/1024)
V
NOTES:
1. The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors (see text).
2. The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal 1
LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code.
3. Zero-scale error is the deviation from zero-voltage output when the digital input code is zero (see text).
4. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) – EZS (Tmin)]/Vref × 106/(Tmax – Tmin).
5. Gain error is the deviation from the ideal output (Vref – 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-scale
error.
6. Gain temperature coefficient is given by: EG TC = [EG(Tmax) – EG (Tmin)]/Vref × 106/(Tmax – Tmin).
7. Zero-scale-error rejection ratio (EZS-RR) is measured by varying the VDD from 4.5 V to 5.5 V dc and measuring the proportion of
this signal imposed on the zero-code output voltage.
8. Gain-error rejection ratio (EG-RR) is measured by varying the VDD from 4.5 V to 5.5 V dc and measuring the proportion of this signal
imposed on the full-scale output voltage after subtracting the zero-scale change.
voltage output (OUT)
VO
IOSC
VOL(low)
VOH(high)
PARAMETER
Voltage output range
Output load regulation accuracy
Output short circuit current
Output voltage, low-level
Output voltage, high-level
TEST CONDITIONS
RL = 10 kΩ
VO(OUT) = 2 V,
RL = 2 kΩ
OUT to VDD or AGND
IO(OUT) ≤ 5 mA
IO(OUT) ≤ –5 mA
MIN TYP
MAX UNIT
0
VDD–0.4 V
0.5 LSB
20
mA
0.25 V
4.75
V
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