SN74LVC2G79 Datasheet, PDF (3/13 Pages) Texas Instruments – DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SN74LVC2G79
DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP
SCES498B − OCTOBER 2003 − REVISED DECEMBER 2003
recommended operating conditions (see Note 4)
MIN
MAX
UNIT
VCC Supply voltage
Operating
Data retention only
1.65
5.5
V
1.5
VIH High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
IOH High-level output current
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
0.65 × VCC
1.7
V
2
0.7 × VCC
0.35 × VCC
0.7
V
0.8
0.3 × VCC
0
5.5
V
0
VCC
V
−4
−8
−16
mA
−24
IOL
Low-level output current
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
−32
4
8
16
mA
24
VCC = 4.5 V
32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
20
∆t/∆v Input transition rise or fall rate
VCC = 3.3 V ± 0.3 V
10
ns/V
VCC = 5 V ± 0.5 V
5
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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