SN74ALVCH16373_07 Datasheet, PDF (3/19 Pages) Texas Instruments – 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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1OE
1LE ⁴⁸
47
1D1
SN74ALVCH16373
16-BIT TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES020I – JULY 1995 – REVISED NOVEMBER 2005
FUNCTION TABLE
(EACH 8-BIT SECTION)
INPUTS
OE LE
D
L
H
H
L
H
L
L
L
X
H
X
X
OUTPUT
Q
H
L
Q₀
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2OE ²⁴
25
2LE
C1
2
C1
1D
1Q1
2D1 ³⁶
1D
13 _2Q1
To Seven Other Channels
Pin numbers shown are for the DGG and DL packages.
To Seven Other Channels
Absolute Maximum Ratings⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
V_CC
Supply voltage range
V_I
Input voltage range⁽²⁾⁽³⁾
V_O
Output voltage range⁽²⁾⁽³⁾
I_IK
Input clamp current
I_OK
Output clamp current
I_O
Continuous output current
Continuous current through each V_CC or GND
θ_JA
Package thermal impedance⁽⁴⁾
T_stg
Storage temperature range
V_I < 0
V_O < 0
DGG package
DL package
GQL/ZQL package
GRD/ZRD package
MIN
MAX UNIT
–0.5
4.6
V
–0.5 V_CC + 0.5
V
–0.5 V_CC + 0.5
V
-50 mA
-50 mA
±50 mA
±100 mA
70
63
°C/W
42
36
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
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