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OPA4872-EP Datasheet, PDF (3/24 Pages) Texas Instruments – 4:1 HIGH-SPEED MULTIPLEXER
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OPA4872-EP
www.ti.com........................................................................................................................................................................................... SBOS444 – DECEMBER 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PACKAGE-LEAD
SO-14
PACKAGE
DESIGNATOR (2)
D
SPECIFIED
TEMPERATURE
RANGE
–55°C to 125°C
PACKAGE
MARKING
OPA4872M
ORDERING
NUMBER
OPA4872MDREP
TRANSPORT
MEDIA, QUANTITY
Tape and Reel, 2500
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
Power supply
Internal power dissipation
Input voltage range
Storage temperature range
Lead temperature (soldering, 10s)
Junction temperature (TJ)
Junction temperature: continuous operation, long-term reliability
Human body model (HBM)
ESD rating Charged device model (CDM)
Machine model (MM)
OPA4872
UNIT
±6.5
V
See Thermal Characteristics
±VS
V
–65 to +125
°C
+260
°C
+150
°C
+140
°C
1500
V
1000
V
200
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
PIN CONFIGURATION
SO-14
Top View
IN0 1
GND 2
IN1 3
GND 4
IN2 5
V- 6
IN3 7
OPA4872
14 V+
13 OUT
12 FB
11 SD
10 EN
9 A1
8 A0
Copyright © 2008, Texas Instruments Incorporated
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