OPA4872-EP Datasheet, PDF (19/24 Pages) Texas Instruments – 4:1 HIGH-SPEED MULTIPLEXER

OPA4872-EP
www.ti.com........................................................................................................................................................................................... SBOS444 – DECEMBER 2008
As a worst-case example, compute the maximum T_J
using an OPA4872ID in the circuit of Figure 27
operating at the maximum specified ambient
temperature of +85°C with its output driving a
grounded 100-Ω load to +2.5 V:
P_D = 10V ´ 11.7mA + (5²/[4 ´ (150W || 1046W)]) = 165mW
Maximum T_J = +85°C + (165mW ´ 80°C/W) = 98°C
This worst-case condition does not exceed the
maximum junction temperature. Normally, this
extreme case is not encountered.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier such as the OPA4872
requires careful attention to board layout parasitics
and external component types. Recommendations to
optimize performance include:
a) Minimize parasitic capacitance to any ac
ground for all of the signal I/O pins. Parasitic
capacitance on the output pin can cause instability;
on the noninverting input, it can react with the source
impedance to cause unintentional bandlimiting. To
reduce unwanted capacitance, a window around the
signal I/O pins should be opened in all of the ground
and power planes around those pins. Otherwise,
ground and power planes should be unbroken
elsewhere on the board.
b) Minimize the distance (< 0.25") from the
power-supply pins to high frequency 0.1-µF
decoupling capacitors. At the device pins, the
ground and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections (on pins 9, 11, 13, and 15)
should always be decoupled with these capacitors.
An optional supply decoupling capacitor across the
two power supplies (for bipolar operation) improves
2nd harmonic distortion performance. Larger (2.2 µF
to 6.8 µF) decoupling capacitors, effective at lower
frequency, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PCB.
c) Careful selection and placement of external
components preserves the high-frequency
performance of the OPA4872. Resistors should be
a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
Again, keep their leads and PCB trace length as short
as possible. Never use wirewound type resistors in a
high-frequency application. Other network
components, such as noninverting input termination
resistors, should also be placed close to the package.
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils) should be used,
preferably with ground and power planes opened up
around them.
Estimate the total capacitive load and set R_S from the
plot of Figure 5. Low parasitic capacitive loads
(greater than 5 pF) may not need an R_S because the
OPA4872 is nominally compensated to operate with a
2-pF parasitic load. If a long trace is required, and the
6dB signal loss intrinsic to a doubly-terminated
transmission line is acceptable, implement a matched
impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook
for microstrip and stripline layout techniques). A 50-Ω
environment is normally not necessary on the board,
and in fact, a higher impedance environment
improves distortion as shown in the Distortion versus
Load plot; see Figure 7. With a characteristic board
trace impedance defined based on board material
and trace dimensions, a matching series resistor into
the trace from the output of the OPA4872 is used as
well as a terminating shunt resistor at the input of the
destination device. Remember also that the
terminating impedance is the parallel combination of
the shunt resistor and the input impedance of the
destination device; this total effective impedance
should be set to match the trace impedance. The
high output voltage and current capability of the
OPA4872 allow multiple destination devices to be
handled as separate transmission lines, each with its
own series and shunt terminations. If the 6-dB
attenuation of a doubly-terminated transmission line
is unacceptable, a long trace can be
series-terminated at the source end only. Treat the
trace as a capacitive load in this case and set the
series resistor value as shown in Figure 5. This
configuration does not preserve signal integrity as
well as a doubly-terminated line. If the input
impedance of the destination device is low, there will
be some signal attenuation because of the voltage
divider formed by the series output into the
terminating impedance.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA4872-EP
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