English
Language : 

DRV8835_15 Datasheet, PDF (3/19 Pages) Texas Instruments – DUAL LOW VOLTAGE H-BRIDGE IC
DRV8835
www.ti.com
SLVSB18D – MARCH 2012 – REVISED JANUARY 2014
Table 1. TERMINAL FUNCTIONS
NAME
PIN
POWER AND GROUND
GND
6
VM
1
VCC
12
CONTROL
MODE
11
AIN1/APHASE
10
AIN2/AENBL
9
BIN1/BPHASE
8
BIN2/BENBL
7
OUTPUT
AOUT1
2
AOUT2
3
BOUT1
4
BOUT2
5
I/O (1)
-
-
-
DESCRIPTION
Device ground
Motor supply
Device supply
I
Input mode select
I
Bridge A input 1/PHASE input
I
Bridge A input 2/ENABLE input
I
Bridge B input 1/PHASE input
I
Bridge B input 2/ENABLE input
O
Bridge A output 1
O
Bridge A output 2
O
Bridge B output 1
O
Bridge B output 2
EXTERNAL COMPONENTS
OR CONNECTIONS
Bypass to GND with a 0.1-μF (minimum)
ceramic capacitor.
Bypass to GND with a 0.1-μF (minimum)
ceramic capacitor.
Logic low selects IN/IN mode.
Logic high selects PH/EN mode.
Internal pulldown resistor.
IN/IN mode: Logic high sets AOUT1 high.
PH/EN mode: Sets direction of H-bridge A.
Internal pulldown resistor.
IN/IN mode: Logic high sets AOUT2 high.
PH/EN mode: Logic high enables H-bridge A.
Internal pulldown resistor.
IN/IN mode: Logic high sets BOUT1 high.
PH/EN mode: Sets direction of H-bridge B.
Internal pulldown resistor.
IN/IN mode: Logic high sets BOUT2 high.
PH/EN mode: Logic high enables H-bridge B.
Internal pulldown resistor.
Connect to motor winding A
Connect to motor winding B
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
DSS PACKAGE
(TOP VIEW)
VM 1
AOUT1 2
AOUT2 3
BOUT1 4
BOUT2 5
GND 6
12 VCC
11 MODE
GND
(PPAD )
10 AIN1 / APHASE
9 AIN2 / AENBL
8 BIN1 / BPHASE
7 BIN2 / BENBL
Copyright © 2012–2014, Texas Instruments Incorporated
Product Folder Links: DRV8835
Submit Documentation Feedback
3