DRV8803_15 Datasheet, PDF (3/20 Pages) Texas Instruments – QUAD LOW-SIDE DRIVER IC

DRV8803
www.ti.com
SLVSAW5B – JULY 2011 – REVISED FEBRUARY 2012
Table 1. TERMINAL FUNCTIONS
NAME
PIN
(SOIC)
POWER AND GROUND
GND
5, 6, 7,
14, 15, 16
VM
1
CONTROL
nENBL
10
PIN
(HTSSOP)
5, 12,
PPAD
1
8
RESET
11
9
IN1
IN2
IN3
IN4
STATUS
18
14
17
13
13
11
12
10
nFAULT
20
16
OUTPUT
OUT1
OUT2
OUT3
OUT4
3
3
4
4
8
6
9
7
VCLAMP
2
2
I/O ⁽¹⁾
-
-
I
I
I
I
I
I
OD
O
O
O
O
-
DESCRIPTION
Device ground
Device power supply
Enable input
Reset input
Channel 1 input
Channel 2input
Channel 3 input
Channel 4 input
Fault
Output 1
Output 2
Output 3
Output 4
Output clamp voltage
EXTERNAL COMPONENTS
OR CONNECTIONS
All pins must be connected to GND.
Connect to motor supply (8.2 V - 60 V).
Active low enables outputs – internal pulldown
Active high resets internal logic and OCP –
internal pulldown
IN1 = 1 drives OUT1 low – internal pulldown
IN2 = 1 drives OUT2 low – internal pulldown
IN3 = 1 drives OUT3 low – internal pulldown
IN4 = 1 drives OUT4 low – internal pulldown
Logic low when in fault condition (overtemp,
overcurrent)
Connect to load 1
Connect to load 2
Connect to load 3
Connect to load 4
Connect to VM supply, or zener diode to VM
supply
(1) Directions: I = input, O = output, OD = open-drain output
DW (WIDE SOIC) PACKAGE
(TOP VIEW)
VM 1
VCLAMP 2
OUT1 3
OUT2 4
GND 5
GND 6
GND 7
OUT3 8
OUT4 9
nENBL 10
20 _nFAULT
19 _NC
18 _IN1
17 _IN2
16 _GND
15 _GND
14 _GND
13 _IN3
12 _IN4
11 _RESET
PWP (HTSSOP) PACKAGE
(TOP VIEW)
VM 1
VCLAMP 2
OUT1 3
OUT2 4
GND 5
OUT3 ⁶
OUT4 ⁷
nENBL ⁸
16 _nFAULT
15 _NC
14 _IN1
13 _IN2
GND
12 _GND
11 _IN3
10 _IN4
9 _RESET
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Product Folder Link(s): DRV8803
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