DRV8802-Q1_15 Datasheet, PDF (3/26 Pages) Texas Instruments – DRV8802-Q1 Automotive DC Motor-Driver IC

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5 Pin Configuration and Functions
DRV8802-Q1
SLVSCI2A – JUNE 2014 – REVISED JUNE 2014
CP1
CP2
VCP
VMA
AOUT1
ISENA
AOUT2
BOUT2
ISENB
BOUT1
VMB
AVREF
BVREF
GND
28-Pin HTSSOP With PowerPAD
PWP Package
Top View
1
28 GND
2
27 BI1
3
26 BI0
4
25 AI1
5
24 AI0
6
23 BPHASE
7
PowerPAD ^{22 BENBL}
8
21 AENBL
9
20 APHASE
10
19 DECAY
11
18 nFAULT
12
17 nSLEEP
13
16 nRESET
14
15 V3P3OUT
PIN
NAME
NO.
POWER AND GROUND
CP1
1
CP2
2
14
GND
28
V3P3OUT
15
VMA
4
VMB
11
VCP
3
CONTROL
AI0
24
AI1
25
AENBL
21
APHASE
20
AVREF
12
BVREF
13
BI0
26
BI1
27
BENBL
22
BPHASE
23
DECAY
19
TYPE ⁽¹⁾
Pin Functions
DESCRIPTION
IO
Charge pump flying capacitor
IO
Charge pump flying capacitor
—
Device ground
O
3.3-V regulator output
—
Bridge A power supply
—
Bridge B power supply
IO
High-side gate drive voltage
I
Bridge A current set
I
I
Bridge A enable
I
Bridge A phase (direction)
I
Bridge A current set reference input
I
Bridge B current set reference input
I
Bridge B current set
I
I
Bridge B enable
I
Bridge B phase (direction)
I
Decay (brake) mode
nRESET
16
I
Reset input
nSLEEP
17
I
Sleep mode input
(1) I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: DRV8802-Q1
EXTERNAL COMPONENTS
OR CONNECTIONS
Connect a 0.01-μF 50-V capacitor between
CP1 and CP2.
Bypass to GND with a 0.47-μF 6.3-V ceramic
capacitor. Can be used to supply VREF.
Connect to motor supply (8 to 45 V). Both
pins must be connected to same supply.
Connect a 0.1-μF 16-V ceramic capacitor and
a 1-MΩ resistor to VMx.
Sets bridge A current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Logic high to enable bridge A
Logic high sets AOUT1 high, AOUT2 low
Reference voltage for winding current set.
Can be driven individually with an external
DAC for microstepping, or tied to a reference
(for example, V3P3OUT).
Sets bridge B current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Logic high to enable bridge B
Logic high sets BOUT1 high, BOUT2 low
Low = brake (slow decay),
high = coast (fast decay)
Active-low reset input initializes internal logic
and disables the H-bridge outputs
Logic high to enable device, logic low to enter
low-power sleep mode
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