DRV8802-Q1_15 Datasheet, PDF (12/26 Pages) Texas Instruments – DRV8802-Q1 Automotive DC Motor-Driver IC

DRV8802-Q1
SLVSCI2A – JUNE 2014 – REVISED JUNE 2014
www.ti.com
7.3.5 Blanking Time
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time
before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also
sets the minimum on time of the PWM.
7.3.6 nRESET and nSLEEP Operation
The nRESET pin, when driven active low, resets the internal logic. This pin also disables the H-bridge drivers. All
inputs are ignored while nRESET is active.
Driving nSLEEP low puts the device into a low power sleep state. In this state, the H-bridges are disabled, the
gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In
this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time
(approximately 1 ms) must pass before the motor driver becomes fully operational.
7.3.7 Protection Circuits
The DRV8802-Q1 device is fully protected against undervoltage, overcurrent, and overtemperature events.
FAULT
V_(VMx) undervoltage
(UVLO)
Overcurrent (OCP)
Overtemperature
Shutdown (OTS)
ERROR REPORT
No error report – nFAULT
is hi-Z
nFAULT pulled low
nFAULT remains pulled
low (set during OTW)
H-BRIDGE
Disabled
Disabled
Disabled
CHARGE PUMP
Shut Down
Operating
Shut Down
RECOVERY
V_(VMx) > VUVLO RISING
Retry time, t_(OCP)
T_J < T_(OTS) – T_hys(OTS)
7.3.7.1 Overcurrent Protection (OCP)
An analog current-limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current-limit persists for longer than the OCP time, all FETs in the H-bridge are disabled and the nFAULT
pin is driven low. The device remains disabled until either nRESET pin is applied, or V_(VMx) is removed and re-
applied.
Overcurrent conditions on both high-side and low-side devices (such as a short to ground, supply, or across the
motor winding) result in an overcurrent shutdown. Note that overcurrent protection does not use the current
sense circuitry used for PWM current control and is independent of the R_(ISENx) resistor value or xVREF voltage.
7.3.7.2 Thermal Shutdown (TSD)
If the die temperature exceeds the thermal shutdown temperature limit, all FETs in the H-bridge are disabled and
the nFAULT pin is driven low. When the die temperature has fallen below the temperature hsyteresis level,
operation resumes automatically.
7.3.7.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VMx pins falls below the undervoltage lockout threshold voltage, all circuitry in
the device is disabled and internal logic resets. Operation resumes when V_M rises above the UVLO threshold.
7.4 Device Functional Modes
The DRV8802-Q1 device is active unless the nSLEEP pin is brought logic low. In sleep mode the charge pump is
disabled, the V3P3OUT regulator is disabled, and the H-bridge FETs are disabled hi-Z. The DRV8802-Q1 is
brought out of sleep mode when nSLEEP is brought logic high.
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