BQ500110_11 Datasheet, PDF (3/25 Pages) Texas Instruments – Qi Compliant Wireless Power Transmitter Manager

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bq500110
SLUSAE0A – NOVEMBER 2010 – REVISED APRIL 2011
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
SUPPLY CURRENT
I_V33A
I_V33D
I_V33D
Supply current
V33A = 3.3 V
V33D = 3.3 V
V33D = 3.3 V while storing configuration
parameters in flash memory
INTERNAL REGULATOR CONTROLLER INPUTS/OUTPUTS
V33
3.3-V linear regulator
Emitter of NPN transistor
V33FB
3.3-V linear regulator feedback
I_V33FB
Beta
Series pass base drive
Series NPN pass device
V_IN = 12 V; current into V33FB pin
EXTERNALLY SUPPLIED 3.3 V POWER
V33D
V33A
V33Slew
Digital 3.3-V power
Analog 3.3-V power
V33 slew rate
T_A = 25°C
T_A = 25°C
V33 slew rate between 2.3V and 2.9V,
V33A = V33D
MODULATION AMPLIFIER INPUTS EAP-A, EAN-A, EAP-B, EAN-B
V_CM
EAP-EAN
Common mode voltage each pin
Modulation voltage digital resolution
R_EA
Input Impedance
Ground reference
I_OFFSET
Input offset current
1 kΩ source impedance
ANALOG INPUTS V_IN, I_IN, TEMP_IN, I_COIL, LED_MODE, PMOD_THR
V_{ADDR_OPEN}
V_{ADDR_SHORT}
V_{ADC_RANGE}
INL
Voltage indicating open pin
Voltage indicating pin shorted to GND
Measurement range for voltage monitoring
ADC integral nonlinearity
LED_MODE, PMOD_THR open
LED_MODE, PMOD_THR shorted to ground
Inputs: V_IN, I_IN, TEMP_IN, I_COIL
I_lkg
Input leakage current
R_IN
Input impedance
C_IN
Input capacitance
DIGITAL INPUTS/OUTPUTS
3V applied to pin
Ground reference
V_OL
Low-level output voltage
I_OL = 6 mA ⁽¹⁾, V33D = 3 V
V_OH
High-level output voltage
V_IH
High-level input voltage
V_IL
Low-level input voltage
I_OH(MAX)
Output high source current
I_OL(MAX)
Output low sink current
SYSTEM PERFORMANCE
V_RESET
t_RESET
F_SW
t_detect
t_retention
Write_Cycles
Voltage where device comes out of reset
Pulse width needed for reset
Switching Frequency
Time to detect presence of device requesting power
Retention of configuration parameters
Number of nonvolatile erase/write cycles
I_OH = -6 mA ⁽²⁾, V33D = 3 V
V33D = 3V
V33D = 3.5 V
V33D Pin
RESET pin
T_J = 25°C
T_J = 25°C ^{(3) (4)}
MIN NOM MAX UNIT
8
15
42
55 _mA
53
65
3.25 3.3
4
10
40
3.6
V
4.6
mA
3
3.6
V
3
3.6
V
0.25
V/ms
–0.15
1.631
V
1
mV
0.5 1.5
3 MΩ
–5
5 µA
2.37
V
0.36
V
0
2.5
V
-2.5
2.5 mV
100 nA
8
MΩ
10 pF
V33D
-0.6V
2.1
DGND
1 +0.25
V
V
3.6
V
1.4
V
4 mA
4 mA
2.3
2.4
V
2
µs
110
205 kHz
0.6 sec
100
Years
20
K cycles
(1) The maximum I_OL, for all outputs combined, should not exceed 12 mA to hold the maximum voltage drop specified.
(2) The maximum I_OH, for all outputs combined, should not exceed 48 mA to hold the maximum voltage drop specified.
(3) With default device calibration. PMBus calibration can be used to improve the regulation tolerance.
(4) Time from close of error ADC sample window to time when digitally calculated control effort (duty cycle) is available. This delay must be
accounted for when calculating the system dynamic response. Includes EADC conversion time.
Copyright © 2010–2011, Texas Instruments Incorporated
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