CC2400_07 Datasheet, PDF (29/83 Pages) Texas Instruments – 2.4 GHz Low-Power RF Transceiver

CC2400
23 Packet Handling Hardware Support
The CC2400 has built-in hardware support
for packet oriented radio protocols.
is required, Chipcon recommends that
FSK be used at 1 Mbps instead of GFSK.
The buffered mode packet handling
support can in transmit mode be used to
construct the data packet:
• Add a programmable number of
preamble bytes
• Add a synchronization word
• Compute and add a CRC
computed over the data field
In receive mode the packet handling
support can be used to de-construct the
data packet:
• Synchronization word detection
• Compute and check the received
CRC
The packet handling support can be
combined with the 8/10 line-encoding
scheme. The 8/10 coding will apply to the
data field (FIFO data) of the packet only
(and CRC).
In un-buffered mode the synchronization
word detection can be used to mute DCLK
until a valid sync word is received.
23.1 Data packet format
The format of the data packet can be
configured, and can consist of the
following items:
• Preamble
• Synchronization word
• Data
• CRC
See Table 16 and Figure 11 for details.
The preamble pattern is ‘(0)101010…’.
The first bit in the preamble is always the
same as the first bit in the synchronization
word. The length of the preamble is
programmable. The default and
recommended length is 4 bytes.
When using GFSK modulation at 1 Mbps,
Chipcon recommends using a preamble
length of 32 bytes in order to avoid a high
level of bit errors. If low packet overhead
GRMDM.
PRE_BYTES[2:0]
Number of bytes
(8 bits)
000
0*
001
1
010
2
011
4
100
8
101
16
110
32
111
Infinitely until TX
GRMDM.PRE_BYTES
[2:0] is set to 000
* Should not be used if packet reception is to be
used. Use to terminate infinite transmission (111).
The length of the synchronization word is
programmable as shown below.
GRMDM.
SYNC_WORD_SIZE
[1:0]
00
01
10
11
Number of bits
8
16
24
32
The synchronization word is
programmable in the SYNCL and SYNCH
registers. The default (and recommended)
synchronization word length is 32 bits,
which gives high immunity against false
synchronization word indication. If lower
immunity can be accepted, one can
reduce the length to 16 bits. (However,
using 8 bits will typically give too many
false synchronization word indications.)
A threshold on the number of bits in error
when receiving the synchronization word
can
be
programmed
in
GRMDM.SYNC_ERRBITS_ALLOWED[1:0]
in the range 0 – 3. (A threshold of 0 is
default.)
23.2 Error detection
When the CRC is enabled it will be
calculated based on the data field of the
packet, i.e. not including the preamble or
the synchronization word. When
transmitting the packet the CRC is
appended after the last data byte in the
SWRS042A
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