TMS320C6713B_10 Datasheet, PDF (27/154 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

signal groups description
CLKIN
CLKOUT2/GP[2]
CLKOUT3
CLKMODE0
PLLHV
TMS
TDO
TDI
TCK
TRST
EMU0
EMU1
EMU2†
EMU3†
EMU4†
EMU5†
TMS320C6713B
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS294B − OCTOBER 2005 − REVISED JUNE 2006
Clock/PLL
Oscillator
IEEE Standard
1149.1
(JTAG)
Emulation
Reset and
Interrupts
Control/Status
RESET
NMI
GP[7](EXT_INT7)^‡§
GP[6](EXT_INT6)^‡§
GP[5](EXT_INT5)/AMUTEIN0‡§
GP[4](EXT_INT4)/AMUTEIN1‡§
HD4/GP[0]^‡
HD15/GP[15]
HD14/GP[14]
HD13/GP[13]
HD12/GP[12]
HD11/GP[11]
HD10/GP[10]
HD9/GP[9]
HD8/GP[8]
HD7/GP[3]
HD6/AHCLKR1
HD5/AHCLKX1
HD4/GP[0]
HD3/AMUTE1
HD2/AFSX1
HD1/AXR1[7]
HD0/AXR1[4]
HPI
(Host-Port Interface)
Data
Control
Register Select
Half-Word
Select
HAS/ACLKX1
HR/W/AXR1[0]
HCS/AXR1[2]
HDS1/AXR1[6]
HDS2/AXR1[5]
HRDY/ACLKR1
HINT/GP[1]
HCNTL0/AXR1[3]
HCNTL1/AXR1[1]
HHWIL/AFSR1
† _{These external pins are applicable to the GDP and ZDP packages only.}
‡ _{The GP[15:0] pins, through interrupt sharing, are external interrupt capable via GPINT0. For more details, see the External}
Interrupt Sources section of this data sheet. For more details on interrupt sharing, see the TMS320C6000 DSP Interrupt Selector
Reference Guide (literature number SPRU646).
§ _{All of these pins are external interrupt sources. For more details, see the External Interrupt Sources section of this data sheet.}
NOTE A: On multiplexed pins, bolded text denotes the active function of the pin for that particular peripheral module.
Figure 4. CPU (DSP Core) and Peripheral Signals
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