THS6062 Datasheet, PDF (26/31 Pages) Texas Instruments – LOW-NOISE ADSL DUAL DIFFERENTIAL RECEIVER

THS6062
LOW-NOISE ADSL DUAL DIFFERENTIAL RECEIVER
SLOS228B – JANUARY 1999 – REVISED JUNE 1999
APPLICATION INFORMATION
general PowerPAD design considerations
1. Prepare the PCB with a top side etch pattern as shown in Figure 47. There should be etch for the leads as
well as etch for the thermal pad.
2. Place five holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept
small so that solder wicking through the holes is not a problem during reflow.
3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps
dissipate the heat generated by the THS6062DGN IC. These additional vias may be larger than the 13-mil
diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad
area to be soldered so that wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,
the holes under the THS6062DGN package should make their connection to the internal ground plane with
a complete connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five
holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This
prevents solder from being pulled away from the thermal pad area during the reflow process.
7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8. With these preparatory steps in place, the THS6062DGN IC is simply placed in position and run through
the solder reflow operation as any standard surface-mount component. This results in a part that is properly
installed.
The actual thermal performance achieved with the THS6062DGN in its PowerPAD package depends on the
application. In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches,
then the expected thermal coefficient, θ_JA, is about 58.4°C/W. For comparison, the non-PowerPAD version of
+ ǒ Ǔ ^{the THS6062 IC (SOIC) is shown. For a given θJA, the maximum power dissipation is shown in Figure 48 and}
is calculated by the following formula:
PD
TMAX–TA
q_JA
Where:
P_D = Maximum power dissipation of THS6062 IC (watts)
T_MAX = Absolute maximum junction temperature (150°C)
T_A = Free-ambient air temperature (°C)
θ_JA = θ_JC + θ_CA
θ_JC = Thermal coefficient from junction to case
θ_CA = Thermal coefficient from case to ambient air (°C/W)
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