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AM3892 Datasheet, PDF (254/299 Pages) Texas Instruments – AM389x Sitara ARM Microprocessors (MPUs)
AM3894
AM3892
SPRS681A – OCTOBER 2010 – REVISED MARCH 2011
www.ti.com
Table 8-79. Switching Characteristics Over Recommended Operating Conditions for McASP(1)
(see Figure 8-75)
NO.
9 tc(AHCLKRX)
10 tw(AHCLKRX)
PARAMETER
Cycle time, MCA[x]_AHCLKR/X
Pulse duration, MCA[x]_AHCLKR/X high or low
MIN
20 (2)
0.5P -
2.5 (3)
MAX UNIT
ns
ns
11 tc(ACLKRX)
12 tw(ACLKRX)
Cycle time, MCA[x]_ACLKR/X
Pulse duration, MCA[x]_ACLKR/X high or low
20
ns
0.5P -
2.5 (3)
ns
13 td(ACLKRX-AFSRX)
Delay time, MCA[x]_ACLKR/X transmit edge to
MCA[x]_AFSR/X output valid
Delay time, MCA[x]_ACLKR/X transmit edge to
MCA[x]_AFSR/X output valid with Pad Loopback
ACLKR/X int
ACLKR/X ext in
ACLKR/X ext out
0
6
2
13.5 ns
2
13.5
14 td(ACLKX-AXR)
Delay time, MCA[x]_ACLKX transmit edge to
MCA[x]_AXR output valid
Delay time, MCA[x]_ACLKX transmit edge to
MCA[x]_AXR output valid with Pad Loopback
ACLKX int
ACLKX ext in
ACLKX ext out
0
6
2
13.5 ns
2
13.5
15 tdis(ACLKX-AXR)
Disable time, MCA[x]_ACLKX transmit edge to
MCA[x]_AXR output high impedance
Disable time, MCA[x]_ACLKX transmit edge to
MCA[x]_AXR output high impedance with Pad
Loopback
ACLKX int
ACLKX ext in
ACLKX ext out
0
6
2
13.5
ns
2
13.5
(1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
(2) 50 MHz
(3) P = AHCLKR/X period.
254 Peripheral Information and Timings
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