THS770006_10 Datasheet, PDF (25/36 Pages) Texas Instruments – Broadband, Fully-Differential, 14-/16-Bit ADC DRIVER AMPLIFIER

THS770006
www.ti.com
SBOS520 – JULY 2010
TESTING THE ADS5493 WITH AN AC-COUPLED LOW-PASS FILTER
For testing the ADS5493, a 150MHz, first-order, low-pass filter is built on the EVM with the following component
changes: R10, R16, L3, and L24 = 100Ω, and C148 = 1.2pF. AC-coupling is done by inserting a 1µF capacitor
for C133 and C136. This design gives approximately 1.6dB insertion loss at low frequency, requiring the amplifier
signal be 2.7V_PP in order to drive the ADC to -1dBFS.
With 2.7V_PP amplifier output voltage swing and 180MHz (–3dB) bandwidth, the expected SNR from the amplifier
+ antialias filter is 84.4dB. When added in combination with the ADS5493, the total expected SNR is 74.7dBFS
for the typical case. Note the frequency response is approximately -1dB at 100MHz, which requires even higher
amplitude for the following test.
Figure 40 shows the resulting FFT plot when driving the ADC to –1dBFS with a 100MHz sine wave, and
sampling at 125MSPS. Test results showed 91dBc SFDR from second- and third-order harmonic and 73.1dBFS
SNR; analysis of the plot is shown in Table 4 versus typical ADC specifications. As a result of harmonic
attenuation and phase shift between the amplifier and ADC, harmonic performance is better than predicted from
the worst-case scenario described previously. Typical expected results should be approximately 90dBc SFDR
and 73dBFS SNR.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
0 5 10 15 20 25 30 35 40 45 50 55 62.5
Frequency (MHz)
Figure 40. FFT Plot of THS770006 + 180MHz LPF + ADS5493 with Single-Tone at 100MHz
Table 4. Analysis of FFT for THS770006 + 180MHz LPF + ADS5493 at 100MHz vs Typical ADC
Specifications
CONFIGURATION
THS770006 + BPF + ADS5493
ADS5493 Only (typ)
ADC INPUT
–1dBFS
–1dBFS
SNR
73.1dBFS
75.2dBFS
HD2
–91dBc
–100dBc
HD3
–91dBc
–100dBc
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