THS4500 Datasheet, PDF (24/37 Pages) Texas Instruments – WIDEBAND, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIERS

THS4500
THS4501
SLOS350D − APRIL 2002 − REVISED JANUARY 2004
INTERFACING TO AN ANALOG-TO-DIGITAL
CONVERTER
The THS4500 family of amplifiers are designed
specifically to interface to today’s highest-performance
analog-to-digital converters. This section highlights the
key concerns when interfacing to an ADC and provides
example ADC/fully differential amplifier interface circuits.
Key design concerns when interfacing to an
analog-to-digital converter:
D Terminate the input source properly. In high-frequency
receiver chains, the source feeding the fully
differential amplifier requires a specific load
impedance (e.g., 50 Ω).
D Design a symmetric printed-circuit board layout.
Even-order distortion products are heavily influenced
by layout, and careful attention to a symmetric layout
will minimize these distortion products.
D Minimize inductance in power supply decoupling
traces and components. Poor power supply
decoupling can have a dramatic effect on circuit
performance. Since the outputs are differential,
differential currents exist in the power supply pins.
Thus, decoupling capacitors should be placed in a
manner that minimizes the impedance of the current
loop.
D Use separate analog and digital power supplies and
grounds. Noise (bounce) in the power supplies
(created by digital switching currents) can couple
directly into the signal path, and power supply noise
can create higher distortion products as well.
D Use care when filtering. While an RC low-pass filter
may be desirable on the output of the amplifier to filter
broadband noise, the excess loading can negatively
impact the amplifier linearity. Filtering in the feedback
path does not have this effect.
D AC-coupling allows easier circuit design. If
dc-coupling is required, be aware of the excess power
dissipation that can occur due to level-shifting the
output through the output common-mode voltage
control.
D Do not terminate the output unless required. Many
open-loop, class-A amplifiers require 50-Ω
termination for proper operation, but closed-loop fully
differential amplifiers drive a specific output voltage
regardless of the load impedance present.
Terminating the output of a fully differential amplifier
with a heavy load adversely effects the amplifier’s
linearity.
D Comprehend the V_OCM input drive requirements.
Determine if the ADC’s voltage reference can provide
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the required amount of current to move V_OCM to the
desired value. A buffer may be needed.
D Decouple the V_OCM pin to eliminate the antenna
effect. V_OCM is a high-impedance node that can act as
an antenna. A large decoupling capacitor on this node
eliminates this problem.
D Be cognizant of the input common-mode range. If the
input signal is referenced around the negative power
supply rail (e.g., around ground on a single 5 V
supply), then the THS4500/1 accommodates the
input signal. If the input signal is referenced around
midrail, choose the THS4502/3 for the best operation.
D Packaging makes a difference at higher frequencies.
If possible, choose the smaller, thermally enhanced
MSOP package for the best performance. As a rule,
lower junction temperatures provide better
performance. If possible, use a thermally enhanced
package, even if the power dissipation is relatively
small compared to the maximum power dissipation
rating to achieve the best results.
D Comprehend the effect of the load impedance seen by
the fully differential amplifier when performing
system-level intercept point calculations. Lighter
loads (such as those presented by an ADC) allow
smaller intercept points to support the same level of
intermodulation distortion performance.
EXAMPLE ANALOG-TO-DIGITAL
CONVERTER DRIVER CIRCUITS
The THS4500 family of devices is designed to drive
high-performance ADCs with extremely high linearity,
allowing for the maximum effective number of bits at the
output of the data converter. Two representative circuits
shown below highlight single-supply operation and split
supply operation. Specific feedback resistor, gain resistor,
and feedback capacitor values are not specified, as their
values depend on the frequency of interest. Information on
calculating these values can be found in the applications
material above.
CF
RS Rg
Rf
5V
VS
RT
5V
10 µF
+−
VOCM
0.1 µF _Riso
IN _ADS5410
12 Bit/80 MSps
1 µF
−+
THS4503
IN
Riso
CM
Rg
−5 V ^{10 µF 0.1 µF}
Rf
0.1 µF
CF
Using the THS4503 With the ADS5410
Figure 101