TSB41LV02A Datasheet, PDF (23/50 Pages) Texas Instruments – IEEE 1394a TWO PORT CABLE TRANSCEIVER/ARBITER

TSB41LV02A
IEEE 1394a TWO PORT CABLE TRANSCEIVER/ARBITER
SLLS400A – JANUARY 2000 – REVISED MAY 2000
APPLICATION INFORMATION
designing with PowerPAD™
The TSB41LV02A is housed in a high performance, thermally enhanced, 64-pin PAP PowerPAD package. Use
of the PowerPAD package does not require any special considerations except to note that the PowerPAD, which
is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor. This exposed
pad is connected internally to the package, connected to the substrate of the silicon die, and not connected to
any pin of the package. Therefore, if not implementing PowerPAD PCB features, the use of solder masks (or
other assembly techniques) may be required to prevent any inadvertent shorting by the exposed PowerPAD
of connection etches or vias under the package. The recommended option, however, is to not run any etches
or signal vias under the device, but to have only a grounded thermal land as explained in the following. Although
the actual size of the exposed die pad may vary, the minimum size required for the keepout area for the 64-pin
PAP PowerPAD package is 8 mm × 8 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the
PowerPAD package. The thermal land will vary in size, depending on the PowerPAD package being used, the
PCB construction, and the amount of heat that needs to be removed. In addition, the thermal land may or may
not contain numerous thermal vias depending on PCB construction.
Other requirements for thermal lands and thermal vias are detailed in the TI application note PowerPAD
Thermally Enhanced Package Application Report, TI literature number SLMA002, available via the TI Web
pages beginning at URL: http://www.ti.com.
Figure 10. Example of a Thermal Land for the TSB41LV02A PHY
For the TSB41LV02A, this thermal land should be grounded to the low impedance ground plane of the device.
This improves not only thermal performance but also the electrical grounding of the device. It is also
recommended that the device ground terminal landing pads be connected directly to the grounded thermal land.
The land size should be as large as possible without shorting device signal terminals. The thermal land may
be soldered to the exposed PowerPAD using standard reflow soldering techniques.
While the thermal land may be electrically floated and configured to remove heat to an external heat sink, it is
recommended that the thermal land be connected to the low impedance ground plane for the device. More
information may be obtained from the TI application note PHY Layout, TI literature number SLLA020.
PowerPAD is a trademark of Texas Instruments Incorporated.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
23