THS4509 Datasheet, PDF (23/30 Pages) Texas Instruments – WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER

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RS
V _Signal
RS
V _S+
R _PU
RG
RF
R_T
V _S+
V _S+
R _PU
R_G
RT
THS 4509
CM
V S-
R_O
V _OUT-
R_O
V _OUT+
R_F
Figure 84. THS4509 DC Coupled Single-Supply
with R_PU Used to Set V_IC
Figure 85 shows AC coupling to the source. Using
capacitors in series with the termination resistors
allows the amplifier to self-bias both input and output
to mid-supply.
R_S
C
R_G
R_F
V _Signal
R_S
R_T
C
R_G
R_T
V _S+= 3 V to 5 V
THS 4509
CM
V _S-
R_O
V _OUT-
R_O
V _OUT+
C
C
R_F
Figure 85. THS4509 AC Coupled Single-Supply
THS4509 + ADS5500 Combined Performance
The THS4509 is designed to be a high performance
drive amplifier for high performance data converters
like the ADS5500 14-bit 125-MSPS ADC. Figure 86
shows a circuit combining the two devices, and
Figure 87 shows the combined SNR and SFDR
performance versus frequency with –1 dBFS input
signal level sampling at 125 MSPS. The THS4509
amplifier circuit provides 10 dB of gain, converts the
single-ended input to differential, and sets the proper
input common-mode voltage to the ADS5500. The
100-Ω resistors and 2.7-pF capacitor between the
THS4509 outputs and ADS5500 inputs along with the
input capacitance of the ADS5500 limit the bandwidth
of the signal to 115 MHz (–3 dB). For testing, a signal
generator is used for the signal source. The gener-
ator is an AC-coupled 50-Ω source. A band-pass filter
THS4509
SLOS454 – JANUARY 2005
is inserted in series with the input to reduce harmon-
ics and noise from the signal source. Input termin-
ation is accomplished via the 69.8-Ω resistor and
0.22-µF capacitor to ground in conjunction with the
input impedance of the amplifier circuit. A 0.22-µF
capacitor and 49.9-Ω resistor is inserted to ground
across the 69.8-Ω resistor and 0.22-µF capacitor on
the alternate input to balance the circuit. Gain is a
function of the source impedance, termination, and
348-Ω feedback resistor. Refer to Table 3 for
component values to set proper 50-Ω termination for
other common gains. A split power supply of +4V and
-1V is used to set the input and output common-mode
voltages to approximately mid-supply while setting
the input common-mode of the ADS5500 to the
recommended +1.55V. This maintains maximum
headroom on the internal transistors of the THS4509
to insure optimum performance.
From ^VIN
50-W
source
49.9 W
0.22 mF
100 W
348 W
69.3 W
4V
0.22 mF
100 W
THS 4509
69.8 W
0.22 mF
CM
-1 V
348 W
100 W
100 W^{2.7 pF}
0.1 mF
14 -bit,
125 MSPS
A IN +
ADS5500
A IN - _CM
49.9 W
0.1 mF
Figure 86. THS4509 + ADS5500 Circuit
90
SFDR (dBc)
85
80
SNR (dBFS)
75
70
65
10 20 30 40 50 60 70 80 90 100 110
Input Frequency - MHz
Figure 87. THS4509 + ADS5500 SFDR and SNR
Performance versus Frequency
Figure 88 shows the 2-tone FFT of the THS4509 +
ADS5500 circuit with 65 MHz and 70 MHz input
frequencies. The SFDR is 90 dBc.
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