AFE5805_1 Datasheet, PDF (23/51 Pages) Texas Instruments – FULLY-INTEGRATED, 8-CHANNEL ANALOG FRONT-END FOR ULTRASOUND 0.85nV/√Hz, 12-Bit, 50MSPS, 122mW/Channel

AFE5805
www.ti.com................................................................................................................................................. SBOS421C – MARCH 2008 – REVISED OCTOBER 2008
SERIAL REGISTER MAP
Table 2. SUMMARY OF FUNCTIONS SUPPORTED BY SERIAL INTERFACE^(1)(2)(3)(4)
ADDRESS
IN HEX D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NAME
DESCRIPTION
DEFAULT
00
X
S_RST
Self-clearing software RESET. Inactive
03
0
0
0
0
0
0
0
0
0
0
RES_
VCA
0
0
0
0
0
16
X
X
X
X
X
X XXXX
X
XXX1 1
VCA_SDATA
<0:15>
See Table 4 information
D5 = 1
(TGC mode)
17
X
X
X
X
X
X XXXX
X
XXXXX
VCA_SDATA
<16:31>
See Table 4 information
18
XX
X
XXXXX
VCA_DATA
<32:39>
See Table 4 information
XXXX
PDN_CH<1:4>
Channel-specific ADC
power-down mode.
Inactive
x
XX
X
X
PDN_CH<8:5>
Channel-specific ADC
power-down mode.
Inactive
0F
X
PDN_PARTIAL
Partial power-down mode (fast
recovery from power-down).
Inactive
0X
PDN_COMPLETE
Register mode for complete
power-down (slower recovery).
Inactive
X0
PDN_PIN_CFG
Configures the PD pin for
partial power-down mode.
Complete
power-down
LVDS current drive
X X X ILVDS_LCLK<2:0> programmability for LCLKM
and LCLKP pins.
3.5mA drive
11
X
X
X
ILVDS_FRAME
<2:0>
LVDS current drive
programmability for FCLKM
and FCLKP pins.
3.5mA drive
X XX
ILVDS_DAT<2:0>
LVDS current drive
programmability for OUTM and 3.5mA drive
OUTP pins.
X
EN_LVDS_TERM
Enables internal termination
for LVDS buffers.
Termination
disabled
1
12
1
X
X
X
X
X
X
TERM_LCLK<2:0>
Programmable termination for
LCLKM and LCLKP buffers.
Termination
disabled
TERM_FRAME Programmable termination for Termination
<2:0>
FCLKM and FCLKP buffers.
disabled
1
X XX
TERM_DAT<2:0>
Programmable termination for
OUTM and OUTP buffers.
Termination
disabled
14
x
XXXX
LFNS_CH<1:4>
Channel-specific,
low-frequency noise
suppression mode enable.
XX
X
X
LFNS_CH<8:5>
Channel-specific,
low-frequency noise
suppression mode enable.
Inactive
Inactive
X
0
0
EN_RAMP
Enables a repeating full-scale
ramp pattern on the outputs.
Inactive
0
X
0
DUALCUSTOM_
PAT
Enables the mode wherein the
output toggles between two
defined codes.
Inactive
25
0
0
X
SINGLE_CUSTOM
_PAT
Enables the mode wherein the
output is a constant specified
code.
Inactive
2MSBs for a single custom
X
X
BITS_CUSTOM1 pattern (and for the first code
<11:10>
of the dual custom pattern).
<11> is the MSB.
Inactive
XX
BITS_CUSTOM2 2MSBs for the second code of
<11:10>
the dual custom pattern.
Inactive
26
X
X
X
X
X
X XXXX
BITS_CUSTOM1
<9:0>
10 lower bits for the single
custom pattern (and for the
first code of the dual custom
pattern). <0> is the LSB.
Inactive
27
X
X
X
X
X
X XXXX
BITS_CUSTOM2
<9:0>
10 lower bits for the second
code of the dual custom
pattern.
Inactive
(1) The unused bits in each register (identified as blank table cells) must be programmed as '0'.
(2) X = Register bit referenced by the corresponding name and description (default is 0).
(3) Bits marked as '0' should be forced to 0, and bits marked as '1' should be forced to 1 when the particular register is programmed.
(4) Multiple functions in a register should be programmed in a single write operation.
Copyright © 2008, Texas Instruments Incorporated
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