TMS320C6712 Datasheet, PDF (22/110 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSORS

TMS320C6712, TMS320C6712C, TMS320C6712D
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS148J − AUGUST 2000 − REVISED MAY 2004
SIGNAL
NAME
PIN NO.
GFN GDP
TYPE^†
Terminal Functions (Continued)
IPD/
IPU^‡
DESCRIPTION
JTAG EMULATION (CONTINUED)
Emulation [1:0] pins [C6712].
For the C6712 device, the EMU0 and EMU1 pins are internally pulled up with 30-kΩ
resistors. For Emulation and normal operation, no external pullup/pulldown resistors
are necessary. However for the Boundary Scan operation, pull down the EMU1 and
EMU0 pins with a dedicated 1-kΩ resistor.
EMU1
EMU0
Emulation [1:0] pins [C6712C/C6712D].
• Select the device functional mode of operation
EMU[1:0]
Operation
00
Boundary Scan/Functional Mode (see Note)
B9
D9
B9
D9
I/O/Z IPU
01
10
Reserved
Reserved
11
Emulation/Functional Mode [default] (see the IEEE 1149.1
JTAG Compatibility Statement section of this data sheet)
The DSP can be placed in Functional mode when the EMU[1:0] pins are
configured for either Boundary Scan or Emulation.
Note: When the EMU[1:0] pins are configured for Boundary Scan mode, the
internal pulldown (IPD) on the TRST signal must not be opposed in order to
operate in Functional mode.
For the Boundary Scan mode drive EMU[1:0] and RESET pins low [C6712C/12D].
BOOTMODE
Bootmode[1:0]
00 – Emulation boot
BOOTMODE1 C19
C19
BOOTMODE0 C20
C20
I
IPD
01 − CE1 width 8-bit, asynchronous external ROM boot with default timings
(default mode)
10 − CE1 width 16-bit, asynchronous external ROM boot with default timings
11 − Reserved, do not use
LITTLE/BIG ENDIAN FORMAT
LENDIAN
Device Endian mode
0 – System operates in Big Endian mode.
B17
B17
I
IPU
For the C6712D, the EMIFBE pin must be pulled low.
For the C6712 and C6712C, Big Endian mode is not supported
1 − System operates in Little Endian mode.
EMIF Big Endian mode correctness (EMIFBE) [C6712D only]
“Reserved” pin for C6712/C6712C devices
EMIFBE
When Big Endian mode is selected (LENDIAN = 0), for proper C6712D device
operation the EMIFBE pin must be externally pulled low.
C15
I
IPU _{This enhancement is not supported on the C6712/12C devices. For proper}
C6712/C6712C device operation, this pin is “Reserved and must be externally pulled
low with a with a 10-kΩ resistor”.
For more detailed information on the Big Endian mode correctness, see the EMIF Big
Endian Mode Correctness [C6712D Only] portion of this data sheet.
† _{I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground}
‡ _{For C6712, IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal}
to the opposite supply rail, a 1-kΩ resistor should be used.)
For C6712C/12D, IPD = Internal pulldown, IPU = Internal pullup. [These IPD/IPU signal pins feature a 13-kΩ resistor (approximate) for the IPD
or 18-kΩ resistor (approximate) for the IPU. An external pullup or pulldown resistor no greater than 4.4 kΩ and 2.0 kΩ, respectively, should be
used to pull a signal to the opposite supply rail.]
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