THS4601 Datasheet, PDF (22/27 Pages) Texas Instruments – WIDEBAND, FET-INPUT OPERATIONAL AMPLIFIER

THS4601
SLOS388B – OCTOBER 2001 – REVISED JUNE 2002
APPLICATION INFORMATION
PC board layout guidelines
Achieving optimum performance with a high frequency amplifier requires careful attention to board layout
parasitics and external component selection. Recommendations that optimize performance include the
following.
D Use of a ground plane—It is highly recommended that a ground plane be used on the board to provide all
components with a low impedance connection to ground. However, the ground plane should be cleared
around the amplifier inputs and outputs to minimize parasitic capacitance. A solid ground plane is
recommended wherever possible.
D Proper power supply decoupling—A 6.8 µF tantalum capacitor and a 0.1 µF ceramic capacitor should be
used on each power supply node. Good performance is possible if the 6.8 µF capacitor is shared among
several amplifiers, but each amplifier should have a dedicated 0.1 µF capacitor for each supply. The 0.1
µF capacitor should be placed as close to the power supply pins as possible. As the distance from the device
increases, the trace inductance rises and decreases the effectiveness of the capacitor. A good design has
less than 2.5 mm separating the ceramic capacitor and the power supply pin. The tantalum capacitors can
be placed significantly further away from the device.
D Avoid sockets—Sockets are not recommended for high-speed amplifiers. The lead inductance associated
with the socket pins often leads to stability problems. Direct soldering to a printed-circuit board yields the
best performance.
D Minimize trace length and place parts compactly—Shorter traces minimize stray parasitic elements of the
design and lead to better high-frequency performance.
D Use of surface mount passive components—Surface mount passive components are recommended due
to the extremely low lead inductance and the small component footprint. These characteristics minimize
problems with stray series inductance and allow for a more compact circuit layout. Compact layout reduces
both parasitic inductance and capacitance in the design.
D Minimize parasitic capacitance on the signal input and output pins—Parasitic capacitance on the input and
output pins can degrade high frequency behavior or cause instability in the circuit. Capacitance on the
inverting input or the output is a common cause of instability in high performance amplifiers, and
capacitance on the noninverting input can react with the source impedance to cause unintentional
band-limiting. To reduce unwanted capacitance around these pins, a window should be opened up in the
signal/power layers that are underneath those pins. Power and ground planes should otherwise be
unbroken.
PowerPAD design considerations
The THS4601 is available in a thermally-enhanced PowerPAD package. This package is constructed using a
downset leadframe upon which the die is mounted (see Figure 39). This arrangement results in the lead frame
exposed as a thermal pad on the underside of the package. Because this thermal pad has direct thermal contact
with the die, excellent thermal performance can be achieved by providing a good thermal path away from the
thermal pad.
The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat dissipating device. The
PowerPAD is electrically insulated from the amplifier circuitry, but connection to the ground plane is
recommended due to the high thermal mass typically associated with a ground plane.
The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward mechanical methods of heatsinking.
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