BQ24747 Datasheet, PDF (22/36 Pages) Texas Instruments – SMBus-Controlled Level 2 Multi-Chemistry Battery Charger With Input Current Detect Comparator and Charge Enable Pin

bq24747
SLUS988 – OCTOBER 2009 ............................................................................................................................................................................................. www.ti.com
OPEN-DRAIN STATUS OUTPUTS (ACOK, ICOUT)
Two status outputs are available; both require external pull up resistors to pull the pins to the system digital rail
for a high level.
The ACOK open-drain output goes high when ACIN is above 2.4 V. It indicates that a functional adapter is
providing a valid input voltage.
The ICOUT open-drain output goes low when the input current is higher than the threshold programmed via the
ICREF pin. Hysteresis can be programmed by adding a resistor from the ICREF pin to the ICOUT pin.
SMBus INTERFACE
The bq24747 operates as a slave, receiving control inputs from the host through the SMBus interface.
BATTERY-CHARGER COMMANDS
The bq24747 supports four battery-charger commands that use either Write-Word or Read-Word protocols, as
summarized in Table 2. ManufacturerID() and DeviceID() can be used to identify the bq24747. On the bq24747,
the ManufacturerID() command always returns 0x0040 and the DeviceID() command always returns 0x0006.
REGISTER ADDRESS
0x14
0x15
0x3F
0xFE
0xFF
Table 2. Battery Charger SMBus Registers
REGISTER NAME
ChargeCurrent()
ChargeVoltage()
InputCurrent()
ManufacturerID()
DeviceID()
READ/WRITE
Read or Write
Read or Write
Read or Write
Read Only
Read Only
DESCRIPTION
6-Bit Charge Current Setting
11-Bit Charge Voltage Setting
6-Bit Input Current Setting
Manufacturer ID
Device ID
POR STATE
0x0000
0x0000
0x0080
0x0040
0x0006
SMBus Interface
The bq24747 receives commands from the SMBus interface. The bq24747 uses a simplified subset of the
commands documented in the System Management Bus Specification V1.1, which can be downloaded from
www.smbus.org. The bq24747 uses the SMBus Read-Word and Write-Word protocols (see Figure 34) to
communicate with the smart battery. The bq24747 performs only as an SMBus slave device with address
0b0001001_ (0x12), and does not initiate communication on the bus. In addition, the bq24747 has two
identification (ID) registers (0xFE): a 16-bit device ID register and a 16-bit manufacturer ID register (0xFF).
The data (SDA) and clock (SCL) pins have Schmitt-trigger inputs that can accommodate slow edges. Choose
pullup resistors (10 kΩ) for SDA and SCL to achieve rise times according to the SMBus specifications.
Communication starts when the master signals a START condition; a high-to-low transition on SDA while SCL is
high. When the master has finished communicating, the master issues a STOP condition, which is a low-to-high
transition on SDA, while SCL is high. The bus is then free for another transmission. Figure 35 and Figure 36
show the timing diagram for signals on the SMBus interface. The address byte, command byte, and data bytes
are transmitted between the START and STOP conditions. The SDA state changes only while SCL is low, except
for the START and STOP conditions. Data is transmitted in 8-bit bytes, sampled on the rising edge of SCL. Nine
clock cycles are required to transfer each byte to or from the bq24747 because either the master or the slave
acknowledges the receipt of the correct byte during the ninth clock cycle. The bq24747 supports the charger
commands as described in Table 5.
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