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TLFD500PN Datasheet, PDF (21/38 Pages) Texas Instruments – 3.3 V INTEGRATED G.LITE ANALOG FRONT END | |||
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TLFD500PN
3.3 V INTEGRATED G.LITE ANALOG FRONT END
VCR-M â VCXO DAC control register MSB
SLAS207A â JUNE 1999 â REVISED NOVEMBER 1999
Address: 00110b
D7
VCRâM[7]
D6
VCRâM[6]
Contents at reset: 00000000b
D5
D4
D3
VCRâM[5] VCRâM[4] VCRâM[3]
D2
VCRâM[2]
D1
VCRâM[1]
D0
VCRâM[0]
VCR-L â VCXO DAC control register LSB
Address: 00111b
D7
D6
0
0
Contents at reset: 00000000b
D5
D4
D3
0
0
VCRâL[3]
Table 8 shows some representative analog outputs.
D2
VCRâL[2]
D1
VCRâL[1]
D0
VCRâL[0]
Table 8. Representative Analog Outputs
OPERATION
VCRâM[7:0] * 24 + VCRâL[3:0]
Where stepâsize, â = (3/4095) V.
HEX RESULT
0x800
0x801
â¦
0xFFF
0x000
0x001
â¦
0x7FE
0x7FF
ANALOG OUTPUT COMMENTS
0V
Min scale
âV
Just above min
â¦
â¦
2047âV
Just below mid
2048âV
Mid scale
2049âV
Just above mid
â¦
â¦
4094âV
Just below max
4095âV
Max scale
For example, if 0xAA7 is desired, VCR-M and VCR-L should be set to 0xAA and 0x07;
if 0x539 is desired, VCR-M and VCR-L should be set to 0x53 and 0x09.
⢠POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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