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CDCUN1208LP Datasheet, PDF (21/43 Pages) Texas Instruments – 400 MHz Low Power 2:8 Fan-Out Buffer
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FUNCTIONAL DESCRIPTION
CDCUN1208LP
SCAS928 – MAY 2012
DEVICE CONTROL USING CONFIGURATION PINS
Figure 28 illustrates and Table 2 lists the CDCUN1208LP device settings using the configuration pins. Some pins
sense three different states (HIGH, LOW, OPEN) according to Figure 28 and DIGITAL INPUT ELECTRICAL
CHARACTERISTICS – OE (SCL), INSEL, ITTP, OTTP, DIVIDE (SDA/MOSI), ERC(ADDR/CS), MODE. The
device samples the state of the pins at power up and configures the device accordingly. Certain pins including
INSEL and OE are sampled continuously; thus changes of state of INSEL or OE controls the device instantly.
VDD
AUTO
NC
IN2 INSEL
IN1
VDD
VDD
LVCMOS
NC
HCSL
LVDS
ITTP
HCSL
OTTP LVDS
LVCMOS
NC
IN1P
IN 1N
IN 2P
IN2N
VDD
/1
NC
/4 DIVIDE
/2
/1,/2,/4,/8
~~ ~~ ~~
OUT1P
OUT1N
OUT2P
OUT2N
OUT8P
OUT8N
OE
MODE (PINS)
CDCUN1208LP
VDD
Fast
ERC Slow
Medium
NC
Figure 28. CDCUN1208LP Pin Configuration Overview
Table 2. CDCUN1208LP Pin Configuration Summary
PIN NAME PIN NUMBER
DEVICE OUTPUTS
OTTP
19
ERC
31
OE
32
DEVICE INPUTS
ITTP
8
DIVIDE
1
INSEL
2
DEFINITION
Output Type Setting
Edge Rate Control
Device Global Output Enable
Input Type Setting
IN2 Input Divider Control
Input Multiplexer Setting
DEVICE CONFIGURATION
DETAILS
See Table 3
See Table 4
See Table 5
See Table 6
See Table 7
See Table 8
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s) :CDCUN1208LP
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