THS3120 Datasheet, PDF (2/28 Pages) Texas Instruments – LOW-NOISE, HIGH-OUTPUT DRIVE, CURRENT-FEEDBACK, OPERATIONAL AMPLIFIERS

THS3120, THS3121
SLOS420A – SEPTEMBER 2003 – REVISED NOVEMBER 2003
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling procedures and installation procedures can cause damage.
TOP VIEW
D, DGN
TOP VIEW
D, DGN
REF
V_IN−
V_IN+
V_S−
THS3120
1
8
2
7
3
6
4
5
PD
V_S+
V_OUT
NC
NC
V_{IN −}
V_{IN +}
V_S−
THS3121
1
8
2
7
3
6
4
5
NC
V_S+
V_OUT
NC
NC = No Internal Connection
NC = No Internal Connection
Note: The device with the power down option defaults to the ON state if no signal is applied to the PD pin. Additionallly, the REF pin
functional range is from V_S− to (V_S+ − 4 V).
AVAILABLE OPTIONS
T_A
0°C to 70°C
-40°C to 85°C
0°C to 70°C
-40°C to 85°C
PLASTIC SMALL OUTLINE SOIC (D)
THS3120CD
THS3120CDR
THS3120ID
THS3120IDR
THS3121CD
THS3121CDR
THS3121ID
THS3121IDR
PACKAGED DEVICE
PLASTIC MSOP (DGN)⁽¹⁾⁽²⁾
THS3120CDGN
THS3120CDGNR
THS3120IDGN
THS3120IDGNR
THS3121CDGN
THS3121CDGNR
THS3121IDGN
THS3121IDGNR
(1) Available in tape and reel. The R suffix standard quantity is 2500 (e.g. THS3120CDGNR).
(2) The PowerPAD is electrically isolated from all other pins.
SYMBOL
AQA
APN
AQO
APO
DISSIPATION RATING TABLE
PACKAGE
D-8 ⁽¹⁾
DGN-8 ⁽²⁾
Θ_JC (°C/W)
38.3
4.7
Θ_JA (°C/W)
95
58.4
T_A = 25°C
1.05 W
1.71 W
POWER RATING
T_J = 125°C
T_A = 85°C
421 mW
685 W
(1) This data was taken using the JEDEC standard low-K test PCB. For the JEDEC proposed high-K test PCB, the Θ_JA is 95°C/W with
power rating at T_A = 25°C of 1.05 W.
(2) This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3 inch x 3 inch PCB. For further information, refer to
the Application Information section of this data sheet.
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