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SN74CB3Q6800 Datasheet, PDF (2/11 Pages) Texas Instruments – 10 BIT FET BUS SWITCH WITH PRECHAGED OUTPUTS 2.5V/3.3V LOW VOLTAGE HIGH BANDWIDTH BUS SWITCH
SN74CB3Q6800
10ĆBIT FET BUS SWITCH WITH PRECHARGED OUTPUTS
2.5ĆV/3.3ĆV LOWĆVOLTAGE HIGHĆBANDWIDTH BUS SWITCH
SCDS142A − OCTOBER 2003 − REVISED NOVEMBER 2003
description/ordering information
The SN74CB3Q6800 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage
of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance
allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The
device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data
bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q6800 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
The SN74CB3Q6800 is a 10-bit bus switch with a single output-enable (ON) input. When ON is low, the 10-bit
bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When
ON is high, the 10-bit bus switch is OFF and a high-impedance state exists between the A and B ports. The B
port is precharged to bias voltage (BIASV) through the equivalent of a 10-kΩ resistor when ON is high, or if the
device is powered down (VCC = 0 V).
During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to
GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to
GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch
with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers
on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not
cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, ON should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP (QSOP) − DBQ Tape and reel SN74CB3Q6800DBQR CB3Q6800
−40°C to 85°C TSSOP − PW
Tube
Tape and reel
SN74CB3Q6800PW
SN74CB3Q6800PWR
BY800
TVSOP − DGV
Tape and reel SN74CB3Q6800DGVR BY800
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
INPUT
ON
L
H
FUNCTION TABLE
INPUT/OUTPUT
A
FUNCTION
B
A port = B port
Z
Disconnect
B port = BIASV
2
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