CD74HC194 Datasheet, PDF (2/8 Pages) Texas Instruments – High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register

Functional Diagram
CD74HC194, CD74HCT194
3
D₀
4
D₁
5
D₂
6
D₃
DSL
DSR
S0
S1
MR
CP
72
15
Q₀
14
Q₁
13
Q₂
12
Q₃
9 10 1 11
GND = 8
V_CC = 16
TRUTH TABLE
OPERATING
MODE
Reset (Clear)
CP
MR
X
L
INPUTS
OUTPUT
S1
S0
DSR DSL
D_n
Q₀
Q₁
Q₂
Q₃
X
X
X
X
X
L
L
L
L
Hold (Do Nothing)
X
H
l (Note 2) l (Note 2)
X
X
X
q₀
q₁
q₂
q₃
Shift Left
↑
H
h
l (Note 2)
X
l
X
q₁
q₂
q₃
L
↑
H
h
l (Note 2)
X
h
X
q₁
q₂
q₃
H
Shift Right
↑
H
l (Note 2)
h
l
X
X
L
q₀
q₁
q₂
↑
H
l (Note 2)
h
h
X
X
H
q₀
q₁
q₂
Parallel Load
↑
H
h
h
X
X
d_n
d₀
d₁
q₂
d₃
NOTES:
1. H = High Voltage Level,
h = High Voltage Level One Set-up Time Prior To The Low to High Clock Transition,
L = Low Voltage Level,
l = Low Voltage Level One Set-up Time Prior to the Low to High Clock Transition,
d_n (q_n) = Lower Case Letters Indicate the State of the Referenced Input (or output) One Set-up Time Prior to the Low To High Clock
Transition,
X = Don’t Care,
↑ = Transition from Low to High Level
2. The High to Low transition of the S0 and S1 Inputs on the CD74HC194, CD74HCT194 should only take place while CP is High for
Conventional Operation.
2