CD54HC73_08 Datasheet, PDF (2/15 Pages) Texas Instruments – Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Functional Diagram
CD54HC73, CD74HC73, CD74HCT73
14
1J
3
1K
1
1CP
2
1R
7
2J
10
2K
5
2CP
6
2R
FF 1
12
1Q
13
1Q
FF 2
9
2Q
8
2Q
GND = 11
V_CC = 4
R
CP
L
X
H
↓
H
↓
H
↓
H
↓
H
H
H =High Level (Steady State)
L =Low Level (Steady State)
X = Irrelevant
↓ _{= High-to-Low Transition}
INPUTS
Logic Diagram
TRUTH TABLE
J
K
X
X
L
L
H
L
L
H
H
H
X
X
OUTPUTS
Q
Q
L
H
No Change
H
L
L
H
Toggle
No Change
1 (5)
CP
nA
2 (6)
R
14 (7)
J
3(10)
K
J
K
CL
CL _R
12 (9)
Q
13 (8)
Q
2