CD54HC73_08 Datasheet, PDF (1/15 Pages) Texas Instruments – Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Data sheet acquired from Harris Semiconductor
SCHS134E
February 1998 - Revised September 2003
CD54HC73, CD74HC73,
CD74HCT73
Dual J-K Flip-Flop with Reset
Negative-Edge Trigger
[ /Title
(CD74
HC73,
CD74
HCT73
)
/Sub-
ject
(Dual
J-K
Flip-
Flop
Features
Description
• Hysteresis on Clock Inputs for Improved Noise
Immunity and Increased Input Rise and Fall Times
• Asynchronous Reset
• Complementary Outputs
• Buffered Inputs
• _TTAyp=ic2a5l_ofC_MAX = 60MHz at V_CC = 5V, C_L = 15pF,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
The ’HC73 and CD74HCT73 utilize silicon gate CMOS
technology to achieve operating speeds equivalent to LSTTL
parts. They exhibit the low power consumption of standard
CMOS integrated circuits, together with the ability to drive 10
LSTTL loads.
These flip-flops have independent J, K, Reset and Clock
inputs and Q and Q outputs. They change state on the
negative-going transition of the clock pulse. Reset is
accomplished asynchronously by a low level input. This
device is functionally identical to the HC/HCT107 but differs
in terminal assignment and in some parametric limits.
The HCT logic family is functionally as well as pin compatible
with the standard LS logic family.
Ordering Information
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
PART NUMBER
TEMP. RANGE
(^oC)
PACKAGE
CD54HC73F3A
-55 to 125
14 Ld CERDIP
CD74HC73E
-55 to 125
14 Ld PDIP
CD74HC73M
-55 to 125
14 Ld SOIC
CD74HC73MT
-55 to 125
14 Ld SOIC
CD74HC73M96
-55 to 125
14 Ld SOIC
CD74HCT73E
-55 to 125
14 Ld PDIP
CD74HCT73M
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC73 (CERDIP)
CD74HC73, CD74HCT73 (PDIP, SOIC)
TOP VIEW
1CP 1
1R 2
1K 3
V_CC 4
2CP 5
2R 6
2J 7
14 1J
13 1Q
12 1Q
11 GND
10 2K
9 2Q
8 2Q
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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