BQ2204A Datasheet, PDF (2/12 Pages) Texas Instruments – X4 SRAM Nonvolatile Controller Unit

bq2204A
As the supply continues to fall past VPFD, an internal
switching device forces VOUT to one of the two external
backup energy sources. CECON1 through CECON4 are
held high by the VOUT energy source.
During power-up, VOUT is switched back to the 5V sup-
ply as V_CC rises above the backup cell input voltage
sourcing V_OUT. Outputs CE_CON1 through CE_CON4 are
held inactive for time t_CER (120ms maximum) after the
power supply has reached V_PFD, independent of the CE
input, to allow for processor stabilization.
During power-valid operation, the CE input is passed
through to one of the four CECON outputs with a propa-
gation delay of less than 10ns. The CE input is output
on one of the four CECON output pins depending on the
level of the decode inputs at A and B as shown in the
Truth Table.
The A and B inputs are usually tied to high-order ad-
dress pins so that a large nonvolatile memory can be de-
signed using lower-density memory devices. Nonvolatility
and decoding are achieved by hardware hookup as shown
in Figure 1.
5V
From Address
Decoder
3V
Primary
Cell
VCC VOUT
bq2204A
A
B
CECON1
CE CECON2
BC2
THS
VSS
CECON3
CECON4
BC1
VCC
CMOS
SRAM
CE
3V
Primary
Cell
VCC
CMOS
SRAM
CE
VCC
CMOS
SRAM
CE
VCC
CMOS
SRAM
CE
FG220401.eps
Figure 1. Hardware Hookup (5% Supply Operation)
Dec. 1992 B
2