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PCI7610 Datasheet, PDF (196/240 Pages) Texas Instruments – PC Card, UltraMedia, and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller | |||
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8.36 Asynchronous Request Filter Low Register
The asynchronous request filter low set/clear register enables asynchronous receive requests on a per-node basis,
and handles the lower node IDs. Other than filtering different node IDs, this register behaves identically to the
asynchronous request filter high register. See Table 8â28 for a complete description of the register contents.
Bit
Name
Type
Default
Bit
Name
Type
Default
31
RSC
0
15
RSC
0
30
RSC
0
14
RSC
0
29
RSC
0
13
RSC
0
28
RSC
0
12
RSC
0
27
RSC
0
11
RSC
0
26 25 24 23 22 21
Asynchronous request filter low
RSC RSC RSC RSC RSC RSC
0
0
0
0
0
0
10
9
8
7
6
5
Asynchronous request filter low
RSC RSC RSC RSC RSC RSC
0
0
0
0
0
0
20
RSC
0
4
RSC
0
19
RSC
0
3
RSC
0
18
RSC
0
2
RSC
0
17
RSC
0
1
RSC
0
16
RSC
0
0
RSC
0
BIT
31
30
29â2
1
0
Register:
Offset:
Type:
Default:
Asynchronous request filter low
108h set register
10Ch clear register
Read/Set/Clear
0000 0000h
Table 8â28. Asynchronous Request Filter Low Register Description
FIELD NAME
asynReqResource31
asynReqResource30
asynReqResourcen
asynReqResource1
asynReqResource0
TYPE
RSC
RSC
RSC
RSC
RSC
DESCRIPTION
If bit 31 is set to 1 for local bus node number 31, asynchronous requests received by the controller
from that node are accepted.
If bit 30 is set to 1 for local bus node number 30, asynchronous requests received by the controller
from that node are accepted.
Bits 29 through 2 (asynReqResourcen, where n = 29, 28, 27, â¦, 2) follow the same pattern as
bits 31 and 30.
If bit 1 is set to 1 for local bus node number 1, asynchronous requests received by the controller
from that node are accepted.
If bit 0 is set to 1 for local bus node number 0, asynchronous requests received by the controller
from that node are accepted.
8â34
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