DAC5686 Datasheet, PDF (19/46 Pages) Texas Instruments – 16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER

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DETAILED DESCRIPTION (continued)
Complex Input
Spectrum
to DAC5686
0
DAC5686
SLWS147B – APRIL 2003 – REVISED AUGUST 2004
ω
Complex Input
Spectrums
to Quadrature
Modulator
–ω_c
0
–ω_c
0
ω_c
ω
ω_c
ω
rspect = 0
ssb = 0
rspect = 0
ssb = 1
–ω_c
0
ω_c
ω
rspect = 1
ssb = 1
–ω_c
0
ω_c
ω
rspect = 1
ssb = 0
Figure 22. Spectrum After First and Second Up-Converson for Complex Input
To compensate for the sinx/x rolloff of the zero-order hold of the DACs, the DAC5686 provides an inverse sinc
FIR, which provides high-frequency boost. The magnitude spectral response of this filter is presented in the
Digital Filters section.
DAC Gain and Offset Control
Unmatched gains and offsets at the RF quadrature modulator result in unwanted sideband and local-oscillator
feedthrough. Gain and offset imbalances between the two DACs are compensated for by programming
daca_gain, dacb_gain, daca_offset, and dacb_offset in registers 0x0A through 0x0F (see the following
register descriptions). The DAC gain value controls the full-scale output current. The DAC offset value adds a
digital offset to the digital data before digital-to-analog conversion. Care must be taken when using the offset by
restricting the dynamic range of the digital signal to prevent saturation when the offset value is added to the
digital signal.
Quadrature Modulation Mode
In quadrature modulation mode, on-chip mixing of complex I and Q inputs provides the final baseband-to-IF
up-conversion. Quadrature modulation mode is selected by mode[1:0] = 10 in the config_lsb register. Figure 23
shows the data path architecture in quadrature modulation mode. Complex baseband I and Q from the
ASIC/FPGA are input to the DAC5686, which in turn quadrature modulates I and Q to produce the final IF
single-sideband spectrum. DAC A is held constant, while DAC B presents the DAC5686 quadrature modulator
mode output.
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