TRF7970A Datasheet, PDF (18/85 Pages) Texas Instruments – MULTI-PROTOCOL FULLY INTEGRATED 13.56-MHz RFID/NEAR FIELD COMMUNICATION

TRF7970A
SLOS743B – AUGUST 2011 – REVISED MARCH 2012
www.ti.com
The regulator configuration function adjusts the regulator outputs by default to 250 mV below V_IN level, but
not higher than 5 V for V_{DD_RF} , 3.4 V for V_{DD_A} and V_{DD_X}. This ensures the highest possible supply
voltage for the RF output stage while maintaining an adequate PSRR (power supply rejection ratio).
To further improve the PSRR, it is possible to increase the target voltage difference across V_{DD_X} and
V_{DD_A} from its default to 350 mV or even 400 mV (for details see Regulator and I/O Control register (0x0B)
definition in Table 5-1 and Table 5-2.)
5.2.3 Power Modes
The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits
in the chip status control register (0x00) (see Table 5-3).
Table 5-3. Power Modes ⁽¹⁾
Mode
EN2
Mode 4 (Full Power)
at 5 VDC
X
Mode 4 (Full Power)
at 3.3 VDC
X
Mode 3 (Half Power)
at 5 VDC
X
Mode 3 (Half Power)
at 3.3 VDC
X
Mode 2 at 5 VDC
X
Mode 2 at 3.3 VDC
X
Mode 1 at 5 VDC
X
Mode 1 at 3.3 VDC
X
Standby Mode at 5
VDC
X
Standby Mode at 3.3
VDC
X
Power Down Mode
2 (Sleep)
1
Power Down Mode
1 (Total PD)
0
(1) X = Don't care
EN
Chip
Status
Control
Register
(0x00)
Regulator
Control
Register
(0x0B)
Trans-
mitter
Receiver
SYS_CLK
(13.56
MHz)
SYS_CLK
(60 kHz)
1
21
07
ON
ON
ON
X
1
20
07
ON
ON
ON
X
1
31
07
ON
ON
ON
X
1
30
07
ON
ON
ON
X
1
03
07
OFF
ON
ON
X
1
02
00
OFF
ON
ON
X
1
01
07
OFF
OFF
ON
X
1
00
00
OFF
OFF
ON
X
1
81
07
OFF
OFF
ON
X
1
80
00
OFF
OFF
ON
X
0
X
X
OFF
OFF
OFF
ON
0
X
X
OFF
OFF
OFF
OFF
V_{DD_X}
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
Typical
Current
(mA)
Typical
Power
Out
(dBm)
Time
(From
Previous
State)
105
23
approx. 20-
25 µs
68
17
82
20
approx. 20-
25 µs
53
14
13
—
approx. 20-
25 µs
10
—
5
—
approx. 20-
25 µs
3
3
—
4.8 ms
2
—
0.120
—
1.5 ms
<0.001
—
Start
Table 5-3 shows the configuration for the different power modes when using a 5-V or 3-V system supply.
The main reader enable signal is pin EN. When EN is set high, all of the reader regulators are enabled,
the 13.56-MHz oscillator is running and the SYS_CLK (output clock for external micro controller) is also
available.
The input pin EN2 has two functions:
• A direct connection from EN2 to V_IN to ensure the availability of the regulated supply V_{DD_X} and an
auxiliary clock signal (60 kHz, SYS_CLK) for an external MCU. This mode (EN = 0, EN2 = 1) is
intended for systems in which the MCU is also being supplied by the reader supply regulator (V_{DD_X})
and the MCU clock is supplied by the SYS_CLK output of the reader. This allows the MCU supply and
clock to be available during sleep mode.
• EN2 enables the start-up of the reader system from complete power down (EN = 0, EN2 = 0). In this
case the EN input is being controlled by the MCU (or other system device) that is without supply
voltage during complete power down (thus unable to control the EN input). A rising edge applied to the
EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56-
MHz oscillator (identical to condition EN = 1).
18
Detailed System Description
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