TPS65167_07 Datasheet, PDF (18/39 Pages) Texas Instruments – Compact LCD Bias Supply for TFT-LCD TV Panels

TPS65167
TPS65167A
SLVS760B – APRIL 2007 – REVISED OCTOBER 2007
www.ti.com
With:
Vs_HVS = Boost converter output voltage with HVS = high
V_FB = 1.146 V
Overvoltage Protection
The main boost converter has an overvoltage protection of the main switch M1 if the feedback pin (FB) is floating
or shorted to GND causing the output voltage to rise. In such an event, the output voltage is monitored with the
overvoltage protection comparator on the SUP pin. As soon as the comparator trips at typically at 20 V then the
boost converter stops switching. The output voltage will fall below the overvoltage threshold and the converter
continues to operate. See Figure 4.
Note: During high voltage stress test the overvoltage protection is disabled.
Input Capacitor Selection VINB, SUP, SUPN, AVIN, Inductor Input Terminal
For good input voltage filtering, low ESR ceramic capacitors are recommended. The TPS65167 has an analog
input AVIN as well as a power supply input SUP powering all the internal rails. A 1-µF bypass capacitor is
required as close as possible from AVIN to GND as well as from SUP to GND. The SUPN pin needs to be
bypassed with a 470-nF capacitor. Depending on the overall load current two or three 22-µF input capacitors are
required. For better input voltage filtering, the input capacitor values can be increased. To reduce the power
losses across the external isolation switch a filter capacitance at the input terminal of the inductor is required. To
minimize possible audible noise problems, two 10-µF capacitors in parallel are recommended. More capacitance
will further reduce the ripple current across the isolation switch. See Table 2 and the typical applications for input
capacitor recommendations.
CAPACITOR
22 µF/16 V
2 ×10 µF/25 V
2 ×10 µF/25 V
1 µF/35 V
1 µF/25 V
470 nF/25 V
Table 2. Input Capacitor Selection
COMPONENT SUPPLIER
Taiyo Yuden EMK316BJ226ML
Taiyo Yuden TMK316BJ106KL
Taiyo Yuden TMK316BJ106KL
Taiyo Yuden GMK107BJ105KA
Taiyo Yuden TMK107BJ105KA
Taiyo Yuden TMK107BJ474MA
COMMENTS
Pin VINB
Pin VINB (alternative)
Inductor input terminal
Pin SUP
Pin AVIN
Pin SUPN
x
Boost Converter Design Procedure
The first step in the design procedure is to verify whether the maximum possible output current of the boost
converter supports the specific application requirements. To simplify the calculation, the fastest approach is to
estimate the converter efficiency by taking the efficiency numbers from the provided efficiency curves or to use a
worst case assumption for the expected efficiency, e.g., 80%. With the efficiency number it is possible to
calculate the steady state values of the application.
1.
Converter
Duty
Cycle:
D
+
1
*
Vin
Vout
h
ǒ Ǔ _2.
Iout +
Maximum output current:
Isw
*
2
Vin
ƒs
D
L
(1 * D)
3.
Peak
switch
current:
I_swpeak
+
2
Vin
ƒs
D
L
)
1
I_out
*D
With Isw = converter switch current (minimum switch current limit = 3.5 A)
fs = converter switching frequency (typical 750 kHz)
L = Selected inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.8 as an estimation)
18
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