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TPS62600 Datasheet, PDF (18/21 Pages) Texas Instruments – 500-mA, 6-MHz SYNCHRONOUS STEP-DOWN CONVERTER IN CHIP SCALE PACKAGING
TPS62600
TPS62601
SLVS678 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependant issues such as thermal coupling, airflow, added
heat sinks, and convection surfaces, and the presence of other heat-generating components, affect the
power-dissipation limits of a given component
Three basic approaches for enhancing thermal performance are listed below:
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6260x devices is 125°C. The thermal
resistance of the 6-pin CSP package (YFF-6) is RθJA = 125°C/W. Regulator operation is specified to a maximum
ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 320 mW.
PD(MAX) =
TJ(MAX) - TA
RqJA
= 125°C - 85°C
125°C/W
= 320mW
(3)
PACKAGE SUMMARY
CHIP SCALE PACKAGE
(BOTTOM VIEW)
CHIP SCALE PACKAGE
(TOP VIEW)
A2
A1
D
B2
B1
C2
C1
E
YMSCC
LLLL
A1
Code:
• YM — Year Month date Code
• S — Assembly site code
• CC— Chip code
• LLLL — Lot trace code
CHIP SCALE PACKAGE DIMENSIONS
The TPS6260x device is available in an 6-bump chip scale package (YFF, NanoFree™). The package
dimensions are given as:
• D = 1.290 ±0.05 mm
• E = 0.916 ±0.05 mm
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Product Folder Link(s): TPS62600 TPS62601