TLC59401 Datasheet, PDF (18/29 Pages) Texas Instruments – 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL

TLC59401
SBVS137 – DECEMBER 2009
www.ti.com
SETTING GRAYSCALE
The TLC59401 can adjust the brightness of each channel OUTn using a PWM control scheme. The use of 12
bits per channel results in 4096 different brightness steps, from 0% to 100% brightness. Equation 9 determines
the brightness level for each output n:
Brightness
in
%
+
GSn
4095
100
(9)
where:
GSn = the programmed grayscale value for output n (GSn = 0 to 4095)
n = 0 to 15
Grayscale data for all OUTn
The input shift register enters grayscale data into the grayscale register for all channels simultaneously. The
complete grayscale data format consists of 16 × 12 bit words, which forms a 192-bit wide data packet (see
Figure 17). The data packet must be clocked in MSB first.
MSB
0
11
12
GS 15.11
GS 15.0 GS 14.11
GS OUT15
GS OUT14 − GS OUT1
LSB
179
180
191
GS 1.0 GS 0.11
GS 0.0
GS OUT0
Figure 17. Grayscale Data Packet Format
When MODE is set to GND, the TLC59401 enters grayscale data input mode. The device switches the input shift
register to 192-bit width. After all data are clocked in, a rising edge of the XLAT signal latches the data into the
grayscale register (see Figure 18). New grayscale data immediately become valid at the rising edge of the XLAT
signal; therefore, new grayscale data should be latched at the end of a grayscale cycle when BLANK is high. The
first GS data input cycle after dot correction requires an additional SCLK pulse after the XLAT signal to complete
the grayscale update cycle. All GS data in the input shift register are replaced with status information data (SID)
after updating the grayscale register.
DC Mode Data
Input Cycle
First GS Mode Data
Input Cycle After DC Data Input Cycle
Following GS Mode Data
Input Cycle
MODE
t_h3
t_su3
XLAT
SIN
SCLK
DC
LSB
t_h2
96
GS
MSB
t_su2
1
SOUT
DC n
LSB
DC
MSB
X
X
t_h3
t_su1
192
t_wh2
GS
LSB
t_h1
193
GS + 1
MSB
1
GS
MSB
SID
MSB
t_pd0
SID
MSB−1
GS n + 1
LSB
192
SID
LSB
SID n + 1
MSB
Figure 18. Grayscale Data Input Timing Chart
When the IC is powered on, the data in the input shift register and GS register are not set to any default values.
Therefore, GS data must be written to the GS register before turning on the constant-current output.
18
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