THS4508 Datasheet, PDF (18/29 Pages) Texas Instruments – WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER

THS4508
SLAS459A – SEPTEMBER 2005 – REVISED FEBRUARY 2006
Table 4. R_PD Values for Various Gains,
V_S+ = 3.75 V, AC-coupled Signal Source
Gain
6 dB
R_F
348 Ω
R_G
169 Ω
R_IT
64.9 Ω
R_PD
80.6 Ω
10 dB
348 Ω
102 Ω
78.7 Ω
90.9 Ω
14 dB
348 Ω
61.9 Ω
115 Ω
90.9 Ω
20 dB
348 Ω
40.2 Ω
221 Ω
77.6 Ω
C _RS
V _Signal
RG
R_IT
R_PD
RF
V_S+ = 3.75 V to 5 V
R_G
THS4508
C
RS
R_IT
CM
R_PD
V S-
R_O
V _OUT-
R_O
V _OUT+
R_F
Figure 53. THS4508 AC Coupled Single-Source
Supply Range From 3.75 V to 5 V With R_PD Used
To Set V_IC
Video Buffer
Figure 54 shows a possible application of the
THS4508 as a dc-coupled video buffer with a gain of
2. Figure 55 shows a plot of the Y' signal originating
from a HDTV 720p video system. The input signal
includes a 3-level sync (minimum level at -0.3 V), and
the portion of the video signal with maximum
amplitude of 0.7 V. Although the buffer draws its
power from a 5-V single-ended power supply, internal
level shifters allow the buffer to support input signals
which are as much as -0.3 V below ground. This
allows maximum design flexibility while maintaining a
minimum parts count. Figure 56 shows the differential
output of the buffer. Note that the dc-coupled
amplifier can introduce a dc offset on a signal applied
at its input
Video
Source
R_S = 75 W V_IN
175 W
348 W
V_Signal
75 W
130 W
V_S+ = 5 V
175 W
130 W
THS4508
V_S-
V_CM
R_O
R_O
V_OD
348 W
Figure 54. Single-Supply Video Buffer, Gain = 2
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0.8
0.6
0.4
0.2
0
-0.2
-0.4
0
5
10
15
20
t - Time - ms
Figure 55. Y' Signal With 3-Level Sync and Video
Signal
1.5
1
0.5
0
-0.5
-1
0
5
10
15
20
t - Time - ms
Figure 56. Video Buffer Differential Output Signal
THS4508 + ADS5500 Combined Performance
The THS4508 is designed to be a high performance
drive amplifier for high performance data converters
like the ADS5500 14-bit 125-MSPS ADC. Figure 57
shows a circuit combining the two devices, and
Figure 58 shows the combined SNR and SFDR
performance versus frequency with –1 dBFS input
signal level sampling at 125 MSPS. The THS4508
amplifier circuit provides 10 dB of gain, and converts
the single-ended input signal to a differential output
signal. The default common-mode output of the
THS4508 (2.5 V) is not compatible with the required
common-mode input of the ADS5500 (1.55 V), so
dc-blocking capacitors are added (0.22 µF). Note that
a biasing circuit (not shown in Figure 57) is needed to
provide the required common-mode, dc-input for the
ADS5500. The 100-Ω resistors and 2.7-pF capacitor
between the THS4508 outputs and ADS5500 inputs
along with the input capacitance of the ADS5500 limit
the bandwidth of the signal to 115 MHz (–3 dB). For
testing, a signal generator is used for the signal
source. The generator is an ac-coupled 50-Ω source.
A band-pass filter is inserted in series with the input
to reduce harmonics and noise from the signal
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