MSP30X11X2 Datasheet, PDF (18/49 Pages) Texas Instruments – MIXED SINGNAL MICROCONTROLLER

MSP430x11x2, MSP430x12x2
MIXED SIGNAL MICROCONTROLLER
SLAS361C − JANUARY 2002 − REVISED DECEMBER 2003
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
current consumption of active mode versus system frequency
I_AM = I_{AM[1 MHz]} × f_system [MHz]
current consumption of active mode versus supply voltage
I_AM = I_{AM[3 V]} + 120 µA/V × (V_CC−3 V)
Schmitt-trigger inputs Port P1 to Port P3; P1.0 to P1.7, P2.0 to P2.5, P3.0 to P3.7
PARAMETER
TEST CONDITIONS MIN
VIT+ Positive-going input threshold voltage
VIT− Negative-going input threshold voltage
Vhys Input voltage hysteresis, (VIT+ − VIT−)
VCC = 2.2 V
1.1
VCC = 3 V
1.5
VCC = 2.2 V
0.4
VCC = 3 V
0.9
VCC = 2.2 V
0.3
VCC = 3 V
0.5
TYP MAX UNIT
1.5
V
1.9
0.9
V
1.3
1.1
V
1
standard inputs − RST/NMI; TEST
PARAMETER
VIL Low-level input voltage
VIH High-level input voltage
TEST CONDITIONS
VCC = 2.2 V / 3 V
MIN
VSS
0.8×VCC
TYP
MAX
VSS+0.6
VCC
UNIT
V
V
inputs Px.x, TAx
PARAMETER
t(int)
External interrupt timing
TEST CONDITIONS
Port P1, P2: P1.x to P2.x, External trigger signal
for the interrupt flag, (see Note 1)
VCC
2.2 V/3 V
2.2 V
3V
MIN TYP MAX UNIT
1.5
cycle
62
ns
50
t(cap) Timer_A, capture timing
TA0, TA1, TA2
2.2 V
62
ns
3V
50
f(TAext)
Timer_A clock frequency
externally applied to pin
TACLK, INCLK t(H) = t(L)
2.2 V
3V
8
MHz
10
f(TAint) Timer_A clock frequency
SMCLK or ACLK signal selected
2.2 V
3V
8
MHz
10
NOTES: 1. The external signal sets the interrupt flag every time the minimum t(int) cycle and time parameters are met. It may be set even with
trigger signals shorter than t(int). Both the cycle and timing specifications must be met to ensure the flag is set. t(int) is measured in
MCLK cycles.
leakage current
PARAMETER
Ilkg(Px.x) High-impedance leakage current
TEST CONDITIONS
Port P1: P1.x, 0 ≤ × ≤ 7
(see Notes 1 and 2)
Port P2: P2.x, 0 ≤ × ≤ 5
(see Notes 1 and 2)
VCC
2.2 V/3 V
2.2 V/3 V
MIN TYP MAX UNIT
±50
nA
±50
NOTES: 1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.
2. The leakage of the digital port pins is measured individually. The port pin must be selected for input and there must be no optional
pullup or pulldown resistor.
18
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265