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LM2641MTC-ADJ Datasheet, PDF (18/31 Pages) Texas Instruments – LM2641 Dual Adjustable Step-Down Switching Power Supply Controller
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LM2641
SNVS040B – JANUARY 2000 – REVISED APRIL 2013
www.ti.com
The output capacitor adds both a pole and a zero to the loop:
fp(COUT) = 1 / [2π X RL X COUT]
fz(ESR) = 1 / [2π X ESR X COUT]
Where RL is the load resistance, and ESR is the equivalent series resistance of the output capacitor(s).
The function of the compensation components will be explained in a qualitative discussion of a typical loop gain
plot for an LM2641 application, as illustrated in Figure 22.
Figure 22. Typical Loop Gain Plot
C10 and R11 form a pole and a zero. Changing the value of C10 moves the frequency of both the pole and the
zero. Changing R11 moves the zero without significantly affecting the pole.
The C10 pole is typically referred to as the dominant pole, and its primary function is to roll off loop gain and
reduce the bandwidth.
The R11 zero is required to add some positive phase shift to offset some of the negative phase shift from the two
low-frequency poles. Without this zero, these two poles would cause −180° of phase shift at the unity-gain
crossover, which is clearly unstable. Best results are typically obtained if R11 is selected such that the frequency
of fz(R11) is in the range of fc/4 to fc where fc is the unity-gain crossover frequency.
The output capacitor (along with the load resistance RL) forms a pole shown as fp(COUT). Although the frequency
of this pole varies with RL, the loop gain also varies proportionally which means the unity-gain crossover
frequency stays essentially constant regardless of RL value.
C12 can be used to create an additional pole most often used for bypassing high-frequency switching noise on
the COMP pin. In many applications, this capacitor is unnecessary.
If C12 is used, best results are obtained if the frequency of the pole is set in the range FOSC/2 to 2FOSC. This will
provide bypassing for the high-frequency noise caused by switching transitions, but add only a small amount of
negative phase shift at the unity-gain crossover frequency.
The ESR of COUT (as well as the capacitance of COUT) form the zero fz(ESR), which typically falls somewhere
between 10kHz and 50kHz. This zero is very important, as it cancels phase shift caused by the high-frequency
pole fp(HF). It is important to select COUT with the correct value of capacitance and ESR to place this zero near fc
(typical range fc/2 to fc).
As an example, we will present an analysis of the loop gain plot for a 3.3V design. Values used for calculations
are:
VIN = 12V
VOUT = 3.3V @ 4A
COUT = C14 + C16 = 200 µF
ESR = 60 mΩ(each) = 30mΩ total
FOSC = 300kHz
fp(HF) ∼ 40kHz
R13 = 20mΩ
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