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LM2641MTC-ADJ Datasheet, PDF (15/31 Pages) Texas Instruments – LM2641 Dual Adjustable Step-Down Switching Power Supply Controller
LM2641
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SNVS040B – JANUARY 2000 – REVISED APRIL 2013
It must be understood that the maximum allowable current of 50mA must include the current drawn by the gate
drive circuitry. This means that the maximum current available for use at the LIN pin is 50 mA minus whatever is
being used internally for gate drive.
The amount of current used for gate drive by each switching output can be calculated using the formula:
IGD = 2 X Q X FOSC
(1)
Where:
IGD is the gate drive current supplied by VLIN.
Q is the gate charge required by the selected FET (see FET data sheet: Gate Charge Characteristics).
FOSC is the switching frequency.
Example: As shown in the typical application, if the FET NDS8410 is used with the LM2641, the turn-on gate
voltage (VGS) is 5V − VDIODE = 4.3V. Referring to the NDS8410 data sheet, the curve Gate Charge
Characteristics shows that the gate charge for this value of VGS is about 24 nC.
Assuming 300 kHz switching frequency, the gate drive current used by each switching output is:
IGD = 2 X Q X FOSC = 2 X (24 X 10−9) X (3 X 105) = 14.4 mA
(2)
If both outputs are switching, the total gate drive current drawn would be twice (28.8 mA).
Note that in cases where the voltage at switching output #1 is 4.8V or higher, the internal gate drive current is
obtained from that output (which means the full 50 mA is available for external use at the LIN pin).
SYNC Pin
The basic operating frequency of 300kHz can be increased to up to 400kHz by using the SYNC pin and an
external CMOS or TTL clock. The synchronizing pulses must have a minimum pulse width of 200 ns.
If the sync function is not used, the SYNC pin must be connected to the LIN pin or to ground to prevent false
triggering.
Current Limit Circuitry
The LM2641 is protected from damage due to excessive output current by an internal current limit comparator,
which monitors output current on a cycle-by-cycle basis. The current limiter activates when ever the absolute
magnitude of the voltage developed across the output sense resistor exceeds 100 mV (positive or negative
value).
If the sensed voltage exceeds 100 mV, the high-side FET switch is turned OFF. If the sensed voltage goes below
-100 mV, the low-side FET switch is turned OFF. It should be noted that drawing sufficient output current to
activate the current limit circuits can cause the output voltage to drop, which could result in a under-voltage latch-
OFF condition (see Under-voltage/Over-voltage Protection section).
Under-voltage/Over-voltage Protection
The LM2641 contains protection circuitry which activates if the output voltage is too low (UV) or too high (OV). In
the event of either a UV or OV fault, the LM2641 is latched off and the high-side FET is turned off, while the low-
side FET is turned on.
If the output voltage drops below 70% of nominal value, the under-voltage comparator will latch OFF the
LM2641. To restore operation, power to the device must be shut off and then restored.
It should be noted that the UV latch provides protection in cases where excessive output current forces the
output voltage down. The UV latch circuitry is disabled during start-up.
If the output voltage exceeds 150% of nominal, the over-voltage comparator latches off the LM2641. As stated
before, power must be cycled OFF and then ON to restore operation.
It must be noted that the OV latch can not protect the load from damage in the event of a high-side FET switch
failure (where the FET shorts out and connects the input voltage to the load).
Protection for the load in the event of such a failure can be implemented using a fuse in the power lead. Since
the low-side FET switch turns ON whenever the OV latch activates, this would blow a series fuse if the FET and
fuse are correctly sized.
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